[coreboot-gerrit] Change in coreboot[master]: drivers/storage: Add SD/MMC/eMMC support

Martin Roth (Code Review) gerrit at coreboot.org
Tue Apr 11 18:12:28 CEST 2017


Martin Roth has posted comments on this change. ( https://review.coreboot.org/19208 )

Change subject: drivers/storage: Add SD/MMC/eMMC support
......................................................................


Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/19208/5//COMMIT_MSG
Commit Message:

PS5, Line 18: Signed-off-by: Lee Leahy <Leroy.P.Leahy at intel.com>
Clean this up and turn it into a single commit message?



drivers/storage: Add SD/MMC/eMMC support based on depthcharge driver

Copy the SD/MMC driver from depthcharge revision eb583fa8
into coreboot and make the following changes:

- Removed #include "config.h" from mmc.c to allow the lint tests to pass.
- Move include files from drivers/storage into include/device.
- Rename mmc.h to storage.h.
- Add the Kconfig and Makefile and make edits to get the code to build.
- Add support to initialize a PCI controller.
- Fix formatting issues detected by checkpatch.
- Add the missing voltage (MMC_VDD_35_36) into the voltage mask.
- Rename the mmc_debug, mmc_trace and mmc_error to sd_mmc_debug,
sd_mmc_trace and sd_mmc_error.  Replace printf with sd_mmc_error.
- Add sdhc_debug, sdhc_trace and sd_error macros.
- Add Kconfig values to enable debugging and Trace.
- Add tracing and debug support to the SDHCI driver.
- Allow SOC to override more controller features.
- Split out ADMA support.
- Move 1V8 support into soc routine.
- Move HS400 support into soc routine.
- Rework clock handling.
- Change the various controller references to use mmc_ctrlr for the
controller.
- Update the voltage handling.
- Update the modes of operation.
- Move DMA fields into MmcCtrlr.
- Update bus width support.
- Change MMC_TIMING_* to BUS_TIMING_*.
- Rename MMC_MODE_ to DRVR_CAP.
- Move quirks into capabilities.
- Associate removeable with the controller.
- Statically allocate MmcMedia.
- Replace the SdhciHost structure with the MmcCtrlr structure.
- Split the code to allow for other SD/MMC controllers.
- Split out erase and write support.
- Update the code to be more consistent with the coreboot coding style.
- Only expose calling APIs.
- Divide up mmc.c into 4 modules: MMC, SD, Storage card, common code.
- Update debug and error messages.
- Add partition support.
- Display clock frequencies once in MHz.
- Remove display of function names.
- Use ctrlr instead of media->ctrlr or sdhci_ctrlr.
- Remove mmc_send_cmd, use ctrlr->send_cmd instead.
- Handle error from sd_send_op_cond.
- Allow mainboard to control delays around CMD 0.
- Support command logging.
- Mainboard may set delay after SD/MMC command.
- Display serial number with sd_mmc_trace.

TEST=Build and run on Reef & Galileo Gen2

Change-Id: I9b5f9db1e27833e4ce4a97ad4f5ef3a46f64f2a2
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>


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Gerrit-MessageType: comment
Gerrit-Change-Id: I9b5f9db1e27833e4ce4a97ad4f5ef3a46f64f2a2
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lee Leahy <leroy.p.leahy at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Nico Huber <nico.h at gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Stefan Reinauer <reinauer at chromium.org>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: Yes



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