[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use intel/common/uart driver

[Martin Roth (Code Review)]

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/19003 )

Change subject: soc/intel/skylake: Use intel/common/uart driver
......................................................................


soc/intel/skylake: Use intel/common/uart driver

Change-Id: Id132df15ae5a6aef75d6434df18fc71d8d28c3ca
Signed-off-by: Aamir Bohra <aamir.bohra at intel.com>
Reviewed-on: https://review.coreboot.org/19003
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/bootblock/uart.c
2 files changed, 6 insertions(+), 24 deletions(-)

Approvals:
  Aaron Durbin: Looks good to me, approved
  build bot (Jenkins): Verified



diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index e597d62..3024196 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -55,6 +55,7 @@
 	select SOC_INTEL_COMMON_BLOCK_PCR
 	select SOC_INTEL_COMMON_BLOCK_RTC
 	select SOC_INTEL_COMMON_BLOCK_SA
+	select SOC_INTEL_COMMON_BLOCK_UART
 	select SOC_INTEL_COMMON_BLOCK_XHCI
 	select SOC_INTEL_COMMON_LPSS_I2C
 	select SOC_INTEL_COMMON_NHLT
diff --git a/src/soc/intel/skylake/bootblock/uart.c b/src/soc/intel/skylake/bootblock/uart.c
index cf06359..26b81c0 100644
--- a/src/soc/intel/skylake/bootblock/uart.c
+++ b/src/soc/intel/skylake/bootblock/uart.c
@@ -15,16 +15,15 @@
  * GNU General Public License for more details.
  */
 
-#include <arch/io.h>
 #include <console/uart.h>
 #include <device/pci_def.h>
+#include <gpio.h>
 #include <intelblocks/lpss.h>
 #include <intelblocks/pcr.h>
-#include <stdint.h>
+#include <intelblocks/uart.h>
 #include <soc/bootblock.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
-#include <gpio.h>
 
 /* Serial IO UART controller legacy mode */
 #define PCR_SERIAL_IO_GPPRVRW7		0x618
@@ -33,8 +32,8 @@
 #define PCR_SIO_PCH_LEGACY_UART2	(1 << 2)
 
 /* Clock divider parameters for 115200 baud rate */
-#define CLOCK_DIV_M_VAL	0x30
-#define CLOCK_DIV_N_VAL	0xc35
+#define CLK_M_VAL	0x30
+#define CLK_N_VAL	0xc35
 
 /* UART2 pad configuration. Support RXD and TXD for now. */
 static const struct pad_config uart2_pads[] = {
@@ -44,27 +43,9 @@
 
 void pch_uart_init(void)
 {
-	device_t dev = PCH_DEV_UART2;
-	u32 tmp;
 	uintptr_t base = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
 
-	/* Set configured UART2 base address */
-	pci_write_config32(dev, PCI_BASE_ADDRESS_0, (u32)base);
-
-	/* Enable memory access and bus master */
-	tmp = pci_read_config32(dev, PCI_COMMAND);
-	tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
-	pci_write_config32(dev, PCI_COMMAND, tmp);
-
-	/* Take UART2 out of reset */
-	lpss_reset_release(base);
-
-	/*
-	 * Set M and N divisor inputs and enable clock.
-	 * Main reference frequency to UART is:
-	 * 120MHz * M / N = 120MHz * 48 / 3125 = 1843200Hz
-	 */
-	lpss_clk_update(base, CLOCK_DIV_M_VAL, CLOCK_DIV_N_VAL);
+	uart_common_init(PCH_DEV_UART2, base, CLK_M_VAL, CLK_N_VAL);
 
 	/* Put UART2 in byte access mode for 16550 compatibility */
 	if (!IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32))

-- 
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Gerrit-MessageType: merged
Gerrit-Change-Id: Id132df15ae5a6aef75d6434df18fc71d8d28c3ca
Gerrit-PatchSet: 13
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan at intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar at intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude at gmail.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.corp-partner.google.com>
Gerrit-Reviewer: build bot (Jenkins)