[coreboot-gerrit] Change in coreboot[master]: northbridge/amd/stoney: Reserve c0000-fffff

Marshall Dawson (Code Review) gerrit at coreboot.org
Fri Apr 7 19:43:09 CEST 2017


Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/19156 )

Change subject: northbridge/amd/stoney: Reserve c0000-fffff
......................................................................


Patch Set 1:

(3 comments)

https://review.coreboot.org/#/c/19156/1/src/northbridge/amd/pi/00670F00/northbridge.c
File src/northbridge/amd/pi/00670F00/northbridge.c:

PS1, Line 821: #if
> Use regular C if instead of preprocessor #if, both here and below.
I've not developed that habit yet.

> We should go through and change the rest at some point...

Yeah, I think all the AMD stuff is still the old way.


Line 827: 		IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
> Why do these tables necessitate to reserve these memory ranges?
vboot erases anything that's not reserved in memory_wipe_unused().  Once that happens, the OS can't locate the RSDP and therefore none of the ACPI info.  The Intel implementations just reserve all this regardless, IIRC.


PS1, Line 828: >> 10
> / KiB
agree


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Gerrit-MessageType: comment
Gerrit-Change-Id: I9c47c919bbfd0edccf752e052f32d1e47c1a1324
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
Gerrit-Reviewer: Aaron Durbin <adurbin at chromium.org>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd at gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth at google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)
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