[coreboot-gerrit] Change in coreboot[master]: google/kahlee: Add ChromeOS SMBIOS Board ID

Marc Jones (Code Review) gerrit at coreboot.org
Thu Apr 6 19:10:06 CEST 2017


Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19167 )

Change subject: google/kahlee: Add ChromeOS SMBIOS Board ID
......................................................................

google/kahlee: Add ChromeOS SMBIOS Board ID

Kahlee uses 3 GPIO(144, 140, 135) pins to identify the
board revision.

Change-Id: I2dbca5b377bf79bfc91e94806956cc84caa8135f
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kahlee/Makefile.inc
A src/mainboard/google/kahlee/boardid.c
3 files changed, 39 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/19167/1

diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig
index 9c56396..ce73152 100644
--- a/src/mainboard/google/kahlee/Kconfig
+++ b/src/mainboard/google/kahlee/Kconfig
@@ -30,6 +30,7 @@
 	select MAINBOARD_HAS_CHROMEOS
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_LPC
+	select GOOGLE_SMBIOS_MAINBOARD_VERSION
 
 config MAINBOARD_DIR
 	string
diff --git a/src/mainboard/google/kahlee/Makefile.inc b/src/mainboard/google/kahlee/Makefile.inc
index 9acbf79..b937b88 100644
--- a/src/mainboard/google/kahlee/Makefile.inc
+++ b/src/mainboard/google/kahlee/Makefile.inc
@@ -14,9 +14,11 @@
 #
 
 romstage-y += BiosCallOuts.c
+romstage-y += boardid.c
 romstage-y += OemCustomize.c
 
 ramstage-y += BiosCallOuts.c
+ramstage-y += boardid.c
 ramstage-y += OemCustomize.c
 ramstage-$(CONFIG_HUDSON_IMC_FWM) += fchec.c
 
diff --git a/src/mainboard/google/kahlee/boardid.c b/src/mainboard/google/kahlee/boardid.c
new file mode 100644
index 0000000..c312e2f
--- /dev/null
+++ b/src/mainboard/google/kahlee/boardid.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <boardid.h>
+#include <console/console.h>
+#include <southbridge/amd/pi/hudson/gpio.h>
+
+/**
+ * Kahlee uses 3 GPIO(144, 140, 135) pins to identify the board revision.
+ */
+
+uint8_t board_id(void)
+{
+	static int id = -1;
+
+	if (id < 0) {
+		id = gpio_get(GPIO_135) << 0 |
+		     gpio_get(GPIO_140) << 1 |
+		     gpio_get(GPIO_144) << 2;
+		printk(BIOS_SPEW, "Board ID: %#x.\n", id);
+	}
+
+	return id;
+}

-- 
To view, visit https://review.coreboot.org/19167
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I2dbca5b377bf79bfc91e94806956cc84caa8135f
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>



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