[coreboot-gerrit] Change in coreboot[master]: google/kahlee: Update for single DIMM

[Marc Jones (Code Review)]

Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19162 )

Change subject: google/kahlee: Update for single DIMM
......................................................................

google/kahlee: Update for single DIMM

Update for a single DIMM with an SPD at address A0.

Change-Id: I5c0cc25e4b9ff39105cc70e5c548261958d53eb8
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/mainboard/google/kahlee/BiosCallOuts.c
M src/mainboard/google/kahlee/devicetree.cb
2 files changed, 4 insertions(+), 7 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19162/1

diff --git a/src/mainboard/google/kahlee/BiosCallOuts.c b/src/mainboard/google/kahlee/BiosCallOuts.c
index d159acf..171e591 100644
--- a/src/mainboard/google/kahlee/BiosCallOuts.c
+++ b/src/mainboard/google/kahlee/BiosCallOuts.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
+ * Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -134,7 +134,7 @@
 
 const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
 	DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
-	NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
+	NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
 	NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
 	MOTHER_BOARD_LAYERS (LAYERS_6),
 	MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
diff --git a/src/mainboard/google/kahlee/devicetree.cb b/src/mainboard/google/kahlee/devicetree.cb
index e4d08d5..b5384a1 100644
--- a/src/mainboard/google/kahlee/devicetree.cb
+++ b/src/mainboard/google/kahlee/devicetree.cb
@@ -1,7 +1,7 @@
 #
 # This file is part of the coreboot project.
 #
-# Copyright (C) 2015-2016 Advanced Micro Devices, Inc.
+# Copyright (C) 2015-2017 Advanced Micro Devices, Inc.
 #
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -45,9 +45,6 @@
 					chip drivers/generic/generic # dimm 0-0-0
 						device i2c 50 on end
 					end
-					chip drivers/generic/generic # dimm 0-0-1
-						device i2c 51 on end
-					end
 				end # SM
 				device pci 14.3 on  end # LPC	0x790e
 				device pci 14.7 on  end # SD
@@ -61,7 +58,7 @@
 			device pci 18.5 on  end
 			register "spdAddrLookup" = "
 			{
-				{ {0xA0, 0xA2} }, // socket 0 - Channel 0, slots 0 & 1
+				{ {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0
 			}"
 
 		end #chip northbridge/amd/pi/00670F00 # CPU side of HT root complex

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I5c0cc25e4b9ff39105cc70e5c548261958d53eb8
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>