[coreboot-gerrit] Change in coreboot[master]: [WIP] mb/google/poppy: Add new DPTF parameters for Tablet mode

Sumeet R Pawnikar (Code Review) gerrit at coreboot.org
Mon Apr 3 19:44:08 CEST 2017


Sumeet R Pawnikar has uploaded a new change for review. ( https://review.coreboot.org/19087 )

Change subject: [WIP] mb/google/poppy: Add new DPTF parameters for Tablet mode
......................................................................

[WIP] mb/google/poppy: Add new DPTF parameters for Tablet mode

1. Add new DPTF temperature trip points for Tablet mode.
2. Add disable charging entry under charger performance state
3. Use common dptf.asl functionality

BUG=None
BRANCH=None
TEST=Built for poppy.

Change-Id: If68d0f7611c21157b7f4e35e504aafc7b0028551
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
M src/mainboard/google/poppy/acpi/dptf.asl
1 file changed, 15 insertions(+), 1 deletion(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/19087/1

diff --git a/src/mainboard/google/poppy/acpi/dptf.asl b/src/mainboard/google/poppy/acpi/dptf.asl
index 7f6cd8e..eb79183 100644
--- a/src/mainboard/google/poppy/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/acpi/dptf.asl
@@ -21,16 +21,29 @@
 #define DPTF_TSR0_SENSOR_NAME	"Ambient"
 #define DPTF_TSR0_PASSIVE	55
 #define DPTF_TSR0_CRITICAL	70
+#define DPTF_TSR0_TABLET_PASSIVE	44
+#define DPTF_TSR0_TABLET_CRITICAL	90
 
 #define DPTF_TSR1_SENSOR_ID	2
 #define DPTF_TSR1_SENSOR_NAME	"Charger"
 #define DPTF_TSR1_PASSIVE	55
 #define DPTF_TSR1_CRITICAL	75
+#define DPTF_TSR1_TABLET_PASSIVE	44
+#define DPTF_TSR1_TABLET_CRITICAL	90
 
 #define DPTF_TSR2_SENSOR_ID	3
 #define DPTF_TSR2_SENSOR_NAME	"DRAM"
 #define DPTF_TSR2_PASSIVE	52
 #define DPTF_TSR2_CRITICAL	75
+#define DPTF_TSR2_TABLET_PASSIVE	44
+#define DPTF_TSR2_TABLET_CRITICAL	90
+
+#define DPTF_TSR3_SENSOR_ID	4
+#define DPTF_TSR3_SENSOR_NAME	"EMMC"
+#define DPTF_TSR3_PASSIVE	55
+#define DPTF_TSR3_CRITICAL	75
+#define DPTF_TSR3_TABLET_PASSIVE	44
+#define DPTF_TSR3_TABLET_CRITICAL	90
 
 #define DPTF_ENABLE_CHARGER
 
@@ -40,6 +53,7 @@
 	Package () { 0, 0, 0, 0, 24, 0x600, "mA", 0 },	/* 1.5A */
 	Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 },	/* 1.0A */
 	Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 },	/* 0.5A */
+	Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 },	/* 0.0A */
 })
 
 Name (DTRT, Package () {
@@ -80,4 +94,4 @@
 })
 
 /* Include DPTF */
-#include <soc/intel/skylake/acpi/dptf/dptf.asl>
+#include <soc/intel/common/acpi/dptf/dptf.asl>

-- 
To view, visit https://review.coreboot.org/19087
To unsubscribe, visit https://review.coreboot.org/settings

Gerrit-MessageType: newchange
Gerrit-Change-Id: If68d0f7611c21157b7f4e35e504aafc7b0028551
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>



More information about the coreboot-gerrit mailing list