[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge/raminit: Add 100MHz refclock support

[Patrick Rudolph (Code Review)]

Hello Arthur Heymans, build bot (Jenkins),

I'd like you to reexamine a change.  Please visit

    https://review.coreboot.org/17607

to look at the new patch set (#5).

Change subject: nb/intel/sandybridge/raminit: Add 100MHz refclock support
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nb/intel/sandybridge/raminit: Add 100MHz refclock support

Add support for 100MHz reference clock on ivybridge.
Allows to use more frequencies than sandybridge.

Tested on Lenovo T430 (Intel IvyBridge) on DDR3-1800.

Change-Id: I780d34ded2c1e3737ae1af685c8c2da832842e7c
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/northbridge/intel/sandybridge/raminit_ivy.c
1 file changed, 40 insertions(+), 3 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/17607/5
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I780d34ded2c1e3737ae1af685c8c2da832842e7c
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins)