[coreboot-gerrit] Change in coreboot[master]: southbridge/via/vt8237r: Get rid of #include early_smbus.c
Lubomir Rintel (Code Review)
gerrit at coreboot.org
Mon Apr 3 17:03:55 CEST 2017
Lubomir Rintel has uploaded a new change for review. ( https://review.coreboot.org/19082 )
Change subject: southbridge/via/vt8237r: Get rid of #include early_smbus.c
......................................................................
southbridge/via/vt8237r: Get rid of #include early_smbus.c
Using linker instead of '#include *.c'.
Change-Id: Ia369ece6365accbc531736fc463c713bbc134807
Signed-off-by: Lubomir Rintel <lkundrak at v3.sk>
---
M src/mainboard/asus/a8v-e_deluxe/romstage.c
M src/mainboard/asus/a8v-e_se/romstage.c
M src/mainboard/asus/k8v-x/romstage.c
M src/mainboard/asus/m2v-mx_se/romstage.c
M src/mainboard/asus/m2v/romstage.c
M src/mainboard/bcom/winnetp680/romstage.c
M src/mainboard/jetway/j7f2/romstage.c
M src/mainboard/via/epia-cn/romstage.c
M src/mainboard/via/epia-m700/romstage.c
M src/mainboard/via/pc2500e/romstage.c
M src/southbridge/via/k8t890/early_car.c
M src/southbridge/via/vt8237r/Makefile.inc
M src/southbridge/via/vt8237r/early_smbus.c
M src/southbridge/via/vt8237r/vt8237r.h
14 files changed, 23 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/19082/1
diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c
index b8f631b..b71774d 100644
--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c
+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c
@@ -37,7 +37,7 @@
#include "northbridge/amd/amdk8/early_ht.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627ehg/w83627ehg.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */
#include <cpu/x86/bist.h>
#include "northbridge/amd/amdk8/setup_resource_map.c"
diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c
index 4c74d0f..6e938ca 100644
--- a/src/mainboard/asus/a8v-e_se/romstage.c
+++ b/src/mainboard/asus/a8v-e_se/romstage.c
@@ -37,7 +37,7 @@
#include "northbridge/amd/amdk8/early_ht.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83627ehg/w83627ehg.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */
#include <cpu/x86/bist.h>
#include "northbridge/amd/amdk8/setup_resource_map.c"
diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c
index 0f98062..3cc8ffa 100644
--- a/src/mainboard/asus/k8v-x/romstage.c
+++ b/src/mainboard/asus/k8v-x/romstage.c
@@ -37,7 +37,7 @@
#include "northbridge/amd/amdk8/early_ht.c"
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83697hf/w83697hf.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include "northbridge/amd/amdk8/debug.c" /* After vt8237r/early_smbus.c! */
#include <cpu/x86/bist.h>
#include "northbridge/amd/amdk8/setup_resource_map.c"
diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c
index daf0b50..2d29e2d 100644
--- a/src/mainboard/asus/m2v-mx_se/romstage.c
+++ b/src/mainboard/asus/m2v-mx_se/romstage.c
@@ -37,7 +37,7 @@
#include "northbridge/amd/amdk8/debug.c"
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/x86/bist.h>
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c
index c61557b..e805342 100644
--- a/src/mainboard/asus/m2v/romstage.c
+++ b/src/mainboard/asus/m2v/romstage.c
@@ -37,7 +37,7 @@
#include "northbridge/amd/amdk8/debug.c"
#include <superio/ite/common/ite.h>
#include <superio/ite/it8712f/it8712f.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <cpu/x86/bist.h>
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include <spd.h>
diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c
index 0c56074..9ac02d0 100644
--- a/src/mainboard/bcom/winnetp680/romstage.c
+++ b/src/mainboard/bcom/winnetp680/romstage.c
@@ -27,7 +27,7 @@
#include <delay.h>
#include <lib.h>
#include <spd.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83697hf/w83697hf.h>
@@ -84,7 +84,7 @@
console_init();
enable_smbus();
- smbus_fixup(&ctrl);
+ smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0));
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c
index 393f5e6..5aee95d 100644
--- a/src/mainboard/jetway/j7f2/romstage.c
+++ b/src/mainboard/jetway/j7f2/romstage.c
@@ -25,7 +25,7 @@
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
#include <delay.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f71805f/f71805f.h>
#include <lib.h>
@@ -88,7 +88,7 @@
console_init();
enable_smbus();
- smbus_fixup(&ctrl);
+ smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0));
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 5293aa6..27c1a46 100644
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -26,7 +26,7 @@
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
#include <delay.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include "southbridge/via/vt8237r/early_serial.c"
#include <spd.h>
@@ -80,7 +80,7 @@
enable_vt8237r_serial();
console_init();
enable_smbus();
- smbus_fixup(&ctrl);
+ smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0));
report_bist_failure(bist);
enable_mainboard_devices();
ddr_ram_setup(&ctrl);
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 1c10115..57b5949 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -439,7 +439,7 @@
enable_smbus();
/* This fix does help vx800!, but vx855 doesn't need this. */
- /* smbus_fixup(&ctrl); */
+ /* smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0)); */
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 2f002be..7a2edbf 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -26,7 +26,7 @@
#include <cpu/x86/bist.h>
#include <cpu/amd/car.h>
#include <delay.h>
-#include "southbridge/via/vt8237r/early_smbus.c"
+#include <southbridge/via/vt8237r/vt8237r.h>
#include <superio/ite/common/ite.h>
#include <superio/ite/it8716f/it8716f.h>
#include <spd.h>
@@ -56,7 +56,7 @@
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
enable_smbus();
- smbus_fixup(&ctrl);
+ smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0));
report_bist_failure(bist);
ddr_ram_setup(&ctrl);
}
diff --git a/src/southbridge/via/k8t890/early_car.c b/src/southbridge/via/k8t890/early_car.c
index efb6860..22a6a47 100644
--- a/src/southbridge/via/k8t890/early_car.c
+++ b/src/southbridge/via/k8t890/early_car.c
@@ -22,6 +22,7 @@
#include <stdlib.h>
#include <cbmem.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include "k8x8xx.h"
/* The 256 bytes of NVRAM for S3 storage, 256B aligned */
diff --git a/src/southbridge/via/vt8237r/Makefile.inc b/src/southbridge/via/vt8237r/Makefile.inc
index 6c62dbc..e8946a5 100644
--- a/src/southbridge/via/vt8237r/Makefile.inc
+++ b/src/southbridge/via/vt8237r/Makefile.inc
@@ -24,6 +24,7 @@
ramstage-$(CONFIG_PIRQ_ROUTE) += pirq.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
+romstage-y += early_smbus.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
endif
diff --git a/src/southbridge/via/vt8237r/early_smbus.c b/src/southbridge/via/vt8237r/early_smbus.c
index 96a5c1b..3257cc2 100644
--- a/src/southbridge/via/vt8237r/early_smbus.c
+++ b/src/southbridge/via/vt8237r/early_smbus.c
@@ -18,6 +18,9 @@
#if !defined(__ROMCC__)
#include <arch/acpi.h>
#endif
+#include <console/console.h>
+#include <arch/io.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <spd.h>
#include <stdlib.h>
@@ -218,12 +221,11 @@
*
* @param ctrl The memory controller and SMBus addresses.
*/
-void smbus_fixup(const struct mem_controller *ctrl)
+void smbus_fixup(const u8 channel0[], int ram_slots)
{
- int i, ram_slots, current_slot = 0;
+ int i, current_slot = 0;
u8 result = 0;
- ram_slots = ARRAY_SIZE(ctrl->channel0);
if (!ram_slots) {
printk(BIOS_ERR, "smbus_fixup() thinks there are no RAM slots!\n");
return;
@@ -242,7 +244,7 @@
if (current_slot > ram_slots)
current_slot = 0;
- result = smbus_read_byte(ctrl->channel0[current_slot],
+ result = smbus_read_byte(channel0[current_slot],
SPD_MEMORY_TYPE);
current_slot++;
PRINT_DEBUG(".");
diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index d745b49..95f9750 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -136,8 +136,7 @@
u8 smbus_read_byte(u8 dimm, u8 offset);
void smbus_write_byte(u8 dimm, u8 offset, u8 data);
void enable_smbus(void);
-void smbus_fixup(const struct mem_controller *ctrl);
-// these are in vt8237_early_smbus.c - do they really belong there?
+void smbus_fixup(const u8 channel0[], int ram_slots);
void vt8237_sb_enable_fid_vid(void);
void enable_rom_decode(void);
void vt8237_early_spi_init(void);
--
To view, visit https://review.coreboot.org/19082
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia369ece6365accbc531736fc463c713bbc134807
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Lubomir Rintel <lkundrak at v3.sk>
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