[coreboot-gerrit] Patch set updated for coreboot: mainboard/elmex: Add new board pcm205400
伊藤雄一 (yui.corebt@gmail.com)
gerrit at coreboot.org
Wed Sep 21 09:02:52 CEST 2016
伊藤雄一 (yui.corebt at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15929
-gerrit
commit e730d6db9debe279473977f2df40b7c62a6ee77c
Author: Yuichi Ito <yui.corebt at gmail.com>
Date: Thu Jul 28 13:34:18 2016 +0900
mainboard/elmex: Add new board pcm205400
pcm205400 is CPU board equipped with T56N of AMD. We used SeaBIOS and
Windows Embedded Standard 7 to test pcm205400. I disable the port5,
6, and 7 of the PCI-e in elmex/pcm205400/PlatformGnbPcieComplex.h.
I disable the audio capabilities at the 236th line of
elmex/pcm205400/platform_cfg.h. Coding style is modified to avoid the
error and warning that occur when I commit.
Change-Id: I77cb76903fe3c1b500a306426f5399936382695b
Signed-off-by: Yuichi Ito <yui.corebt at gmail.com>
---
src/mainboard/elmex/pcm205400/Kconfig | 7 +-
.../elmex/pcm205400/PlatformGnbPcieComplex.h | 110 ++++++++++++++-------
src/mainboard/elmex/pcm205400/board_info.txt | 4 +-
src/mainboard/elmex/pcm205400/devicetree.cb | 8 +-
src/mainboard/elmex/pcm205400/platform_cfg.h | 12 +--
5 files changed, 85 insertions(+), 56 deletions(-)
diff --git a/src/mainboard/elmex/pcm205400/Kconfig b/src/mainboard/elmex/pcm205400/Kconfig
index b47be3b..61667ec 100644
--- a/src/mainboard/elmex/pcm205400/Kconfig
+++ b/src/mainboard/elmex/pcm205400/Kconfig
@@ -61,14 +61,9 @@ config VGA_BIOS
bool
default n
-#config VGA_BIOS_FILE
-# string "VGA BIOS path and filename"
-# depends on VGA_BIOS
-# default "rom/video/OntarioGenericVbios.bin"
-
config VGA_BIOS_ID
string
- default "1002,9802"
+ default "1002,9806" # FUSION_G_T56N
config SB800_AHCI_ROM
bool
diff --git a/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h b/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
index 4132c7c..0f3fdc6 100644
--- a/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
+++ b/src/mainboard/elmex/pcm205400/PlatformGnbPcieComplex.h
@@ -21,45 +21,85 @@
#include "amdlib.h"
#include <cpu/amd/agesa/s3_resume.h>
-//GNB GPP Port4
-#define GNB_GPP_PORT4_PORT_PRESENT 1 //0:Disable 1:Enable
-#define GNB_GPP_PORT4_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
-#define GNB_GPP_PORT4_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
-#define GNB_GPP_PORT4_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
- //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
-#define GNB_GPP_PORT4_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
+/*
+ * GNB GPP Port4
+ * GNB_GPP_PORT4_PORT_PRESENT 0:Disable 1:Enable
+ * GNB_GPP_PORT4_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
+ * GNB_GPP_PORT4_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
+ * GNB_GPP_PORT4_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
+ * 2:Half-swing(0db) 3:Half-swing(-3.5db)
+ * 4:extended length(-6db) 5:extended length(-8db)
+ * GNB_GPP_PORT4_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
+ */
+#define GNB_GPP_PORT4_PORT_PRESENT 1
+#define GNB_GPP_PORT4_SPEED_MODE 2
+#define GNB_GPP_PORT4_LINK_ASPM 3
+#define GNB_GPP_PORT4_CHANNEL_TYPE 4
+#define GNB_GPP_PORT4_HOTPLUG_SUPPORT 0
-//GNB GPP Port5
-#define GNB_GPP_PORT5_PORT_PRESENT 1 //0:Disable 1:Enable
-#define GNB_GPP_PORT5_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
-#define GNB_GPP_PORT5_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
-#define GNB_GPP_PORT5_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
- //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
-#define GNB_GPP_PORT5_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
+/*
+ * GNB GPP Port5
+ * GNB_GPP_PORT5_PORT_PRESENT 0:Disable 1:Enable
+ * GNB_GPP_PORT5_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
+ * GNB_GPP_PORT5_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
+ * GNB_GPP_PORT5_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
+ * 2:Half-swing(0db) 3:Half-swing(-3.5db)
+ * 4:extended length(-6db) 5:extended length(-8db)
+ * GNB_GPP_PORT5_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
+ */
+#define GNB_GPP_PORT5_PORT_PRESENT 0
+#define GNB_GPP_PORT5_SPEED_MODE 2
+#define GNB_GPP_PORT5_LINK_ASPM 3
+#define GNB_GPP_PORT5_CHANNEL_TYPE 4
+#define GNB_GPP_PORT5_HOTPLUG_SUPPORT 0
-//GNB GPP Port6
-#define GNB_GPP_PORT6_PORT_PRESENT 1 //0:Disable 1:Enable
-#define GNB_GPP_PORT6_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
-#define GNB_GPP_PORT6_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
-#define GNB_GPP_PORT6_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
- //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
-#define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
+/*
+ * GNB GPP Port6
+ * GNB_GPP_PORT6_PORT_PRESENT 0:Disable 1:Enable
+ * GNB_GPP_PORT6_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
+ * GNB_GPP_PORT6_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
+ * GNB_GPP_PORT6_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
+ * 2:Half-swing(0db) 3:Half-swing(-3.5db)
+ * 4:extended length(-6db) 5:extended length(-8db)
+ * GNB_GPP_PORT6_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
+ */
+#define GNB_GPP_PORT6_PORT_PRESENT 0
+#define GNB_GPP_PORT6_SPEED_MODE 2
+#define GNB_GPP_PORT6_LINK_ASPM 3
+#define GNB_GPP_PORT6_CHANNEL_TYPE 4
+#define GNB_GPP_PORT6_HOTPLUG_SUPPORT 0
-//GNB GPP Port7
-#define GNB_GPP_PORT7_PORT_PRESENT 0 //0:Disable 1:Enable
-#define GNB_GPP_PORT7_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
-#define GNB_GPP_PORT7_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
-#define GNB_GPP_PORT7_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
- //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
-#define GNB_GPP_PORT7_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
+/*
+ * GNB GPP Port7
+ * GNB_GPP_PORT7_PORT_PRESENT 0:Disable 1:Enable
+ * GNB_GPP_PORT7_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
+ * GNB_GPP_PORT7_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
+ * GNB_GPP_PORT7_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
+ * 2:Half-swing(0db) 3:Half-swing(-3.5db)
+ * 4:extended length(-6db) 5:extended length(-8db)
+ * GNB_GPP_PORT7_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
+ */
+#define GNB_GPP_PORT7_PORT_PRESENT 0
+#define GNB_GPP_PORT7_SPEED_MODE 2
+#define GNB_GPP_PORT7_LINK_ASPM 3
+#define GNB_GPP_PORT7_CHANNEL_TYPE 4
+#define GNB_GPP_PORT7_HOTPLUG_SUPPORT 0
-//GNB GPP Port8
-#define GNB_GPP_PORT8_PORT_PRESENT 1 //0:Disable 1:Enable
-#define GNB_GPP_PORT8_SPEED_MODE 2 //0:Auto 1:GEN1 2:GEN2
-#define GNB_GPP_PORT8_LINK_ASPM 3 //0:Disable 1:L0s 2:L1 3:L0s+L1
-#define GNB_GPP_PORT8_CHANNEL_TYPE 4 //0:LowLoss(-3.5db) 1:HighLoss(-6db) 2:Half-swing(0db)
- //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db)
-#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
+/*
+ * GNB GPP Port8
+ * GNB_GPP_PORT8_PORT_PRESENT 0:Disable 1:Enable
+ * GNB_GPP_PORT8_SPEED_MODE 0:Auto 1:GEN1 2:GEN2
+ * GNB_GPP_PORT8_LINK_ASPM 0:Disable 1:L0s 2:L1 3:L0s+L1
+ * GNB_GPP_PORT8_CHANNEL_TYPE 0:LowLoss(-3.5db) 1:HighLoss(-6db)
+ * 2:Half-swing(0db) 3:Half-swing(-3.5db)
+ * 4:extended length(-6db) 5:extended length(-8db)
+ * GNB_GPP_PORT8_HOTPLUG_SUPPORT 0:Disable 1:Basic 3:Enhanced
+ */
+#define GNB_GPP_PORT8_PORT_PRESENT 1
+#define GNB_GPP_PORT8_SPEED_MODE 2
+#define GNB_GPP_PORT8_LINK_ASPM 3
+#define GNB_GPP_PORT8_CHANNEL_TYPE 4
+#define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H
diff --git a/src/mainboard/elmex/pcm205400/board_info.txt b/src/mainboard/elmex/pcm205400/board_info.txt
index 85cb19a..e73423f 100644
--- a/src/mainboard/elmex/pcm205400/board_info.txt
+++ b/src/mainboard/elmex/pcm205400/board_info.txt
@@ -1,5 +1,5 @@
-Board name: DBFT1-00-EVAL-KT (Persimmon)
-Category: eval
+Board name: PCM205400
+Category: sbc
ROM protocol: SPI
ROM socketed: n
Flashrom support: y
diff --git a/src/mainboard/elmex/pcm205400/devicetree.cb b/src/mainboard/elmex/pcm205400/devicetree.cb
index afab841..2592f2a 100644
--- a/src/mainboard/elmex/pcm205400/devicetree.cb
+++ b/src/mainboard/elmex/pcm205400/devicetree.cb
@@ -47,7 +47,7 @@ chip northbridge/amd/agesa/family14/root_complex
end
end # SM
device pci 14.1 on end # IDE 0x439c
- device pci 14.2 on end # HDA 0x4383
+ device pci 14.2 off end # HDA 0x4383
device pci 14.3 on # LPC 0x439d
chip superio/fintek/f81865f
device pnp 4e.0 off # Floppy
@@ -57,11 +57,7 @@ chip northbridge/amd/agesa/family14/root_complex
end
device pnp 4e.3 off end # Parallel Port
device pnp 4e.4 off end # Hardware Monitor
- device pnp 4e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
+ device pnp 4e.5 off end # Keyboard
device pnp 4e.6 off end # GPIO
device pnp 4e.a off end # PME
device pnp 4e.10 on # COM1
diff --git a/src/mainboard/elmex/pcm205400/platform_cfg.h b/src/mainboard/elmex/pcm205400/platform_cfg.h
index 660be41..593ccc7 100644
--- a/src/mainboard/elmex/pcm205400/platform_cfg.h
+++ b/src/mainboard/elmex/pcm205400/platform_cfg.h
@@ -208,8 +208,7 @@
*/
#define GEC_CONFIG 0
-static const CODECENTRY persimmon_codec_alc269[] =
-{
+static const CODECENTRY persimmon_codec_alc269[] = {
/* NID, PinConfig */
{0x12, 0x411111F0},
{0x14, 0x99130110},
@@ -225,17 +224,16 @@ static const CODECENTRY persimmon_codec_alc269[] =
{0xff, 0xffffffff} /* end of table */
};
-static const CODECTBLLIST codec_tablelist[] =
-{
- {0x010ec0269, (CODECENTRY*)&persimmon_codec_alc269[0]},
- {0x0FFFFFFFFUL, (CODECENTRY*)0x0FFFFFFFFUL}
+static const CODECTBLLIST codec_tablelist[] = {
+ {0x010ec0269, (CODECENTRY *)&persimmon_codec_alc269[0]},
+ {0x0FFFFFFFFUL, (CODECENTRY *)0x0FFFFFFFFUL}
};
/**
* @def AZALIA_OEM_VERB_TABLE
* Mainboard specific codec verb table list
*/
-#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0])
+//#define AZALIA_OEM_VERB_TABLE (&codec_tablelist[0])
/* set up an ACPI preferred power management profile */
/* from acpi.h
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