[coreboot-gerrit] New patch to review for coreboot: drivers/i2c/tpm/cr50: Clean up timeouts

[Duncan Laurie (dlaurie@chromium.org)]

Duncan Laurie (dlaurie at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16653

-gerrit

commit 93c778688f0bf2f90334505a3082a2cd4ce1623a
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Sep 19 16:49:23 2016 -0700

    drivers/i2c/tpm/cr50: Clean up timeouts
    
    Use two different timeouts in the driver.  The 2ms timeout is needed
    to be safe for cr50 to cover the extended timeout that is seen with
    some commands. The other at 2 seconds which is a TPM spec timeout.
    
    BUG=chrome-os-partner:53336
    
    Change-Id: I77fdd7ea646b8b2fef449f07e3a08bcce174fe8b
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/drivers/i2c/tpm/cr50.c | 25 +++++++++++--------------
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c
index 1190262..6627851 100644
--- a/src/drivers/i2c/tpm/cr50.c
+++ b/src/drivers/i2c/tpm/cr50.c
@@ -42,12 +42,9 @@
 #include "tpm.h"
 
 
-#define SLEEP_DURATION 60 /* in usec */
-#define SLEEP_DURATION_LONG 210 /* in usec */
-#define SLEEP_DURATION_SAFE 750 /* in usec */
-#define SLEEP_DURATION_PROBE_MS 1000 /* in msec */
-
 #define CR50_MAX_BUFSIZE	63
+#define CR50_TIMEOUT_LONG_MS	2000	/* Long timeout while waiting for TPM */
+#define CR50_TIMEOUT_SHORT_MS	2	/* Short timeout during transactions */
 #define CR50_DID_VID		0x00281ae0L
 
 struct tpm_inf_dev {
@@ -85,7 +82,7 @@ static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len)
 	}
 
 	/* Wait for TPM to be ready with response data */
-	udelay(SLEEP_DURATION_SAFE);
+	mdelay(CR50_TIMEOUT_SHORT_MS);
 
 	/* Read response data from the TPM */
 	if (i2c_read_raw(tpm_dev->bus, tpm_dev->addr, buffer, len)) {
@@ -129,7 +126,7 @@ static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len)
 	}
 
 	/* Wait for TPM to be ready */
-	udelay(SLEEP_DURATION_SAFE);
+	mdelay(CR50_TIMEOUT_SHORT_MS);
 
 	return 0;
 }
@@ -201,6 +198,7 @@ static void cr50_tis_i2c_ready(struct tpm_chip *chip)
 {
 	uint8_t buf[4] = { TPM_STS_COMMAND_READY };
 	iic_tpm_write(TPM_STS(chip->vendor.locality), buf, sizeof(buf));
+	mdelay(CR50_TIMEOUT_SHORT_MS);
 }
 
 /* cr50 uses bytes 3:2 of status register for burst count and
@@ -211,13 +209,13 @@ static int cr50_wait_burst_status(struct tpm_chip *chip, uint8_t mask,
 	uint8_t buf[4];
 	struct stopwatch sw;
 
-	stopwatch_init_msecs_expire(&sw, 2000);
+	stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS);
 
 	while (!stopwatch_expired(&sw)) {
 		if (iic_tpm_read(TPM_STS(chip->vendor.locality),
 				 buf, sizeof(buf)) != 0) {
 			printk(BIOS_WARNING, "%s: Read failed\n", __func__);
-			udelay(SLEEP_DURATION_SAFE);
+			mdelay(CR50_TIMEOUT_SHORT_MS);
 			continue;
 		}
 
@@ -229,7 +227,7 @@ static int cr50_wait_burst_status(struct tpm_chip *chip, uint8_t mask,
 		    *burst > 0 && *burst <= CR50_MAX_BUFSIZE)
 			return 0;
 
-		udelay(SLEEP_DURATION_SAFE);
+		mdelay(CR50_TIMEOUT_SHORT_MS);
 	}
 
 	printk(BIOS_ERR, "%s: Timeout reading burst and status\n", __func__);
@@ -310,7 +308,7 @@ static int cr50_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len)
 	uint8_t tpm_go[4] = { TPM_STS_GO };
 	struct stopwatch sw;
 
-	stopwatch_init_msecs_expire(&sw, 2000);
+	stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS);
 
 	/* Wait until TPM is ready for a command */
 	while (!(cr50_tis_i2c_status(chip) & TPM_STS_COMMAND_READY)) {
@@ -321,7 +319,6 @@ static int cr50_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len)
 		}
 
 		cr50_tis_i2c_ready(chip);
-		udelay(SLEEP_DURATION_SAFE);
 	}
 
 	while (len > 0) {
@@ -388,7 +385,7 @@ int tpm_vendor_probe(unsigned bus, uint32_t addr)
 	struct stopwatch sw;
 	uint8_t buf = 0;
 	int ret;
-	long sw_run_duration = SLEEP_DURATION_PROBE_MS;
+	long sw_run_duration = CR50_TIMEOUT_LONG_MS;
 
 	tpm_dev->bus = bus;
 	tpm_dev->addr = addr;
@@ -401,7 +398,7 @@ int tpm_vendor_probe(unsigned bus, uint32_t addr)
 			sw_run_duration = stopwatch_duration_msecs(&sw);
 			break;
 		}
-		udelay(SLEEP_DURATION_SAFE);
+		mdelay(CR50_TIMEOUT_SHORT_MS);
 	} while (!stopwatch_expired(&sw));
 
 	printk(BIOS_INFO,