[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: always enable BOOTBLOCK_CONSOLE

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16622

-gerrit

commit e76a378811b8804acf4bbee2ae61c3ee8c809a7d
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Sep 16 19:25:43 2016 -0500

    soc/intel/apollolake: always enable BOOTBLOCK_CONSOLE
    
    In order to ensure bootblock console output shows up in cbmem
    console unconditionally select BOOTBLOCK_CONSOLE.
    
    BUG=chrome-os-partner:57513
    
    Change-Id: Ie560dd0e7102c79f6db186a11d6f934505bac116
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/apollolake/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 6eae0e1..3a23dbd 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -12,6 +12,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_RAMSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_VERSTAGE_X86_32
+	select BOOTBLOCK_CONSOLE
 	select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	# CPU specific options
@@ -128,7 +129,6 @@ config SOC_UART_DEBUG
 	bool "Enable SoC UART debug port selected by UART_FOR_CONSOLE."
 	default n
 	select CONSOLE_SERIAL
-	select BOOTBLOCK_CONSOLE
 	select DRIVERS_UART
 	select DRIVERS_UART_8250MEM_32
 	select NO_UART_ON_SUPERIO