[coreboot-gerrit] Patch merged into coreboot/master: arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr
gerrit at coreboot.org
gerrit at coreboot.org
Mon Sep 12 19:52:35 CEST 2016
the following patch was just integrated into master:
commit e8c2e839736917e25ddbfc6a84daf1b7ad035c74
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date: Wed Sep 7 20:18:17 2016 +0530
arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr
In the current implementation of postcar_frame_add_mtrr,
if provided size is bigger than the base address alignment,
the alignment is considered as size and covered by the MTRRs
ignoring the specified size.
In this case the callee has to make sure that the provided
size should be smaller or equal to the base address alignment
boundary.
To simplify this, utilize additonal MTRRs to cover the entire
size specified. We reuse the code from cpu/x86/mtrr/mtrr.c.
Change-Id: Ie2e88b596f43692169c7d4440b18498a72fcba11
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
Reviewed-on: https://review.coreboot.org/16509
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/16509 for details.
-gerrit
More information about the coreboot-gerrit
mailing list