[coreboot-gerrit] Patch set updated for coreboot: nb/intel/gm45: Fix DMAR table - IOMMU advertisement for ME interfaces

[Damien Zammit (damien@zamaudio.com)]

Damien Zammit (damien at zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16330

-gerrit

commit 162e4a0732aef08b000bb0c721f1b0c3caffe1b8
Author: Damien Zammit <damien at zamaudio.com>
Date:   Sat Aug 27 00:35:48 2016 +1000

    nb/intel/gm45: Fix DMAR table - IOMMU advertisement for ME interfaces
    
    Previously the ME PCI interface (HECI) was being reported as present in
    the DMAR ACPI table even when ME firmware was missing or the PCI device
    was hidden and HECI would be unresponsive.
    Now we check via the PCI config space itself to verify if the HECI
    is present or not.
    
    Note that this test could fail if ME firmware is present but
    HECI is disabled in devicetree, because it would not advertise that the HECI
    exists even though there is a running ME.  Perhaps this behaviour is desirable
    because in this case you won't see the HECI in the lspci tree anyway.
    
    Change-Id: Ib692d476d85236b4886ecf3d6e6814229f441de0
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
 src/northbridge/intel/gm45/acpi.c  | 3 ++-
 src/northbridge/intel/gm45/iommu.c | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 8990c3b..b90afca 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -72,7 +72,8 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 
 static unsigned long acpi_fill_dmar(unsigned long current)
 {
-	int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL);
+	int me_active = (dev_find_slot(0, PCI_DEVFN(3, 0)) != NULL) &&
+		(pci_read_config8(dev_find_slot(0, PCI_DEVFN(3, 0)), PCI_CLASS_REVISION) != 0xff);
 	int stepping = pci_read_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), PCI_CLASS_REVISION);
 
 	unsigned long tmp = current;
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 10548f4..0c3c18e 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -40,6 +40,8 @@ void init_iommu()
 	}
 	if (me_active) {
 		MCHBAR32(0x10) = IOMMU_BASE3 | 1; /* ME  @ 0:3.0-3 */
+	} else {
+		MCHBAR32(0x10) = 0; /* disable IOMMU for ME */
 	}
 	MCHBAR32(0x20) = IOMMU_BASE4 | 1; /* all other DMA sources */