[coreboot-gerrit] New patch to review for coreboot: southbridge/intel/i82801dx: transition away from device_t
Antonello Dettori (dev@dettori.io)
gerrit at coreboot.org
Sat Sep 3 11:43:05 CEST 2016
Antonello Dettori (dev at dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16485
-gerrit
commit f3376ed9fb6d6aa8834361404a1f82cf34da8b06
Author: Antonello Dettori <dev at dettori.io>
Date: Sat Sep 3 10:45:33 2016 +0200
southbridge/intel/i82801dx: transition away from device_t
Replace the use of the old device_t definition inside
southbridge/intel/i82801dx.
Change-Id: Ic08a23f672f8b5e40b837d49a9475d52c728a306
Signed-off-by: Antonello Dettori <dev at dettori.io>
---
src/southbridge/intel/i82801dx/early_smbus.c | 2 +-
src/southbridge/intel/i82801dx/i82801dx.h | 2 +-
src/southbridge/intel/i82801dx/smihandler.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c
index 3a7d2b0..5bf87d8 100644
--- a/src/southbridge/intel/i82801dx/early_smbus.c
+++ b/src/southbridge/intel/i82801dx/early_smbus.c
@@ -22,7 +22,7 @@
void enable_smbus(void)
{
- device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
+ pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
printk(BIOS_DEBUG, "SMBus controller enabled\n");
/* set smbus iobase */
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index 821ed2c..3ab0fda 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -30,7 +30,7 @@
#include <arch/acpi.h>
#if !defined(__ASSEMBLER__)
-#if !defined(__PRE_RAM__)
+#if !defined(__SIMPLE_DEVICE__)
#include "chip.h"
extern void i82801dx_enable(device_t dev);
#else
diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c
index a558169..3a08daa 100644
--- a/src/southbridge/intel/i82801dx/smihandler.c
+++ b/src/southbridge/intel/i82801dx/smihandler.c
@@ -240,7 +240,7 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) {
u32 reg32;
- device_t dev = PCI_DEV(bus, slot, func);
+ pci_devfn_t dev = PCI_DEV(bus, slot, func);
val = pci_read_config32(dev, PCI_VENDOR_ID);
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