[coreboot-gerrit] New patch to review for coreboot: southbridge/intel/i3100: transition away from device_t

Antonello Dettori (dev@dettori.io) gerrit at coreboot.org
Sat Sep 3 11:43:01 CEST 2016


Antonello Dettori (dev at dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16482

-gerrit

commit ddaedb4474145bbef0901dd7f03db573e786ab7e
Author: Antonello Dettori <dev at dettori.io>
Date:   Sat Sep 3 10:45:33 2016 +0200

    southbridge/intel/i3100: transition away from device_t
    
    Replace the use of the old device_t definition inside
    southbridge/intel/i3100.
    
    Change-Id: Ic9616d5135cfb7206e086e51aaf82eb66540c4bb
    Signed-off-by: Antonello Dettori <dev at dettori.io>
---
 src/southbridge/intel/i3100/early_smbus.c | 2 +-
 src/southbridge/intel/i3100/i3100.h       | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/southbridge/intel/i3100/early_smbus.c b/src/southbridge/intel/i3100/early_smbus.c
index 2cb241a..35c32a4 100644
--- a/src/southbridge/intel/i3100/early_smbus.c
+++ b/src/southbridge/intel/i3100/early_smbus.c
@@ -20,7 +20,7 @@
 
 static void enable_smbus(void)
 {
-	device_t dev = PCI_DEV(0x0, 0x1f, 0x3);
+	pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
 
 	printk(BIOS_SPEW, "SMBus controller enabled\n");
 	pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
diff --git a/src/southbridge/intel/i3100/i3100.h b/src/southbridge/intel/i3100/i3100.h
index 85b30b6..297a2a6 100644
--- a/src/southbridge/intel/i3100/i3100.h
+++ b/src/southbridge/intel/i3100/i3100.h
@@ -36,6 +36,8 @@
 #define SATA_MODE_IDE  0x00
 #define SATA_MODE_AHCI 0x01
 
+#ifndef __SIMPLE_DEVICE__
 void i3100_enable(device_t dev);
+#endif
 
 #endif



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