[coreboot-gerrit] New patch to review for coreboot: mainboard/google/reef: Enable audio clock and power gate
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com)
gerrit at coreboot.org
Sat Sep 3 01:21:47 CEST 2016
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16424
-gerrit
commit 00fea703ddbcb7810c956d95d336b7a10a5ecf96
Author: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Date: Fri Sep 2 16:07:08 2016 -0700
mainboard/google/reef: Enable audio clock and power gate
Removes S0ix blocker. Sets audio clock gate and power gate
bits when audio not in use. Reduces power in S0.
Change-Id: Id5c0adc2605480583dc90ee62a706dbfa4027c1b
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
src/mainboard/google/reef/devicetree.cb | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/mainboard/google/reef/devicetree.cb b/src/mainboard/google/reef/devicetree.cb
index 4d08fae..3f763bb 100644
--- a/src/mainboard/google/reef/devicetree.cb
+++ b/src/mainboard/google/reef/devicetree.cb
@@ -38,6 +38,11 @@ chip soc/intel/apollolake
# Enable DPTF
register "dptf_enable" = "1"
+ # Enable Audio Clock and Power gating
+ register "hdaudio_clk_gate_enable" = "1"
+ register "hdaudio_pwr_gate_enable" = "1"
+ register "hdaudio_bios_config_lockdown" = "1"
+
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route, i.e., if this route changes then the affected GPE
More information about the coreboot-gerrit
mailing list