[coreboot-gerrit] Patch set updated for coreboot: soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0
Rizwan Qureshi (rizwan.qureshi@intel.com)
gerrit at coreboot.org
Mon Nov 28 12:29:07 CET 2016
Rizwan Qureshi (rizwan.qureshi at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17578
-gerrit
commit 46b13d85e45e6c33cd55b9f5892d9ee7d94198bf
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date: Wed Nov 23 15:25:19 2016 +0530
soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0
In FSP 2.0 the UPD to send extra VR Mailbox commands is switched from
SendVrMbxCmd to SendVrMbxCmd1. Use the same in silicon initialization.
Change-Id: I46bd50c9acc0456e2483f20ccb5e9ec2a0de232a
Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
---
src/soc/intel/skylake/chip_fsp20.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 582cdbf..a8aad37 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -218,7 +218,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
dev = dev_find_slot(0, PCH_DEVFN_SPI);
params->ShowSpiController = dev->enabled;
- params->SendVrMbxCmd = config->SendVrMbxCmd;
+ /*
+ * Send VR specific mailbox commands:
+ * 000b - no VR specific command sent
+ * 001b - VR mailbox command specifically for the MPS IMPV8 VR will be sent
+ * 010b - VR specific command sent for PS4 exit issue
+ * 100b - VR specific command sent for MPS VR decay issue
+ */
+ params->SendVrMbxCmd1 = config->SendVrMbxCmd;
soc_irq_settings(params);
}
More information about the coreboot-gerrit
mailing list