[coreboot-gerrit] Patch set updated for coreboot: soc/broadwell/igd.c: limit max CD clock to 450MHz

[Matt DeVillier (matt.devillier@gmail.com)]

Matt DeVillier (matt.devillier at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17456

-gerrit

commit b6fb9fe2640f2d9f7e32b0124adfeee20f3aef93
Author: Matt DeVillier <matt.devillier at gmail.com>
Date:   Wed Nov 16 23:37:43 2016 -0600

    soc/broadwell/igd.c: limit max CD clock to 450MHz
    
    limit the max CD clock frequency to 450MHz for ULT SoCs, as
    higher values result in HDMI audio speedup, failure to pass
    HD audio bitstreams, and other related issues under Windows
    (8/8.1/10).
    The Linux i915 driver renegotiates the cdclk to 337.5Mhz for Broadwell
    ULT regardless, so isn't affected by the value set in firmware.
    
    Change-Id: Ibf253f7ab3ba340b4ab6fd97225155ffb112d74d
    Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
---
 src/soc/intel/broadwell/igd.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index ccb1e93..db4f126 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -407,24 +407,18 @@ static void igd_cdclk_init_broadwell(struct device *dev)
 	gtt_write(0x138124, 0x80000018);
 
 	/* Poll GT driver mailbox for run/busy clear */
-	if (!gtt_poll(0x138124, (1 << 31), (0 << 31)))
-		cdclk = GT_CDCLK_450;
+	gtt_poll(0x138124, (1 << 31), (0 << 31));
 
 	if (gtt_read(0x42014) & 0x1000000) {
 		/* If CD clock is fixed then set to 450MHz */
 		cdclk = GT_CDCLK_450;
 	} else {
-		/* Program CD clock to highest supported freq */
+		/* Limit ULT to 450Mhz, as Windows drivers can't handle higher
+		   speed, and Linux drivers will negotiate down to 337.5Mhz anyway */
 		if (cpu_is_ult())
-			cdclk = GT_CDCLK_540;
-		else
-			cdclk = GT_CDCLK_675;
+			cdclk = GT_CDCLK_450;
 	}
 
-	/* CD clock frequency 675MHz not supported on ULT */
-	if (cpu_is_ult() && cdclk == GT_CDCLK_675)
-		cdclk = GT_CDCLK_540;
-
 	/* Set variables based on CD Clock setting */
 	switch (cdclk) {
 	case GT_CDCLK_337: