[coreboot-gerrit] New patch to review for coreboot: mb/gigabyte/ga-945gcm-s2l: Configure SuperIO EC

Arthur Heymans (arthur@aheymans.xyz) gerrit at coreboot.org
Sat Nov 26 12:45:50 CET 2016


Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17613

-gerrit

commit 90d4b132dc53878f21c808bb2bc731628c845e43
Author: Arthur Heymans <arthur at aheymans.xyz>
Date:   Sat Nov 26 12:44:09 2016 +0100

    mb/gigabyte/ga-945gcm-s2l: Configure SuperIO EC
    
    Change-Id: Id7c2b656f500c14f39d4492667ea461b9ca353b0
    Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
 src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
index a993848..655065a 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
@@ -108,6 +108,31 @@ chip northbridge/intel/i945
 			device pci 1f.0 on # LPC bridge
 				ioapic_irq 2 INTA 0x10
 				chip superio/ite/it8718f # Super I/O
+					register "TMPIN1" = "THERMAL_RESISTOR"
+					register "TMPIN2" = "THERMAL_RESISTOR"
+					register "TMPIN3" = "THERMAL_DIODE"
+					register "ec.vin_mask" = "VIN_ALL"
+
+					register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
+					register "FAN1.smart.tmpin" = "3"
+					register "FAN1.smart.tmp_off" = "30"
+					register "FAN1.smart.tmp_start" = "35"
+					register "FAN1.smart.tmp_full" = "75"
+					register "FAN1.smart.tmp_delta" = "3"
+					register "FAN1.smart.smoothing" = "1"
+					register "FAN1.smart.pwm_start" = "0"
+					register "FAN1.smart.slope" = "10"
+
+					register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
+					register "FAN2.smart.tmpin" = "3"
+					register "FAN2.smart.tmp_off" = "30"
+					register "FAN2.smart.tmp_start" = "35"
+					register "FAN2.smart.tmp_full" = "75"
+					register "FAN2.smart.tmp_delta" = "3"
+					register "FAN2.smart.smoothing" = "1"
+					register "FAN2.smart.pwm_start" = "0"
+					register "FAN2.smart.slope" = "10"
+
 					device pnp 2e.0 off end # Floppy
 					device pnp 2e.1 on # COM1
 						io 0x60 = 0x3f8



More information about the coreboot-gerrit mailing list