[coreboot-gerrit] Patch set updated for coreboot: mb/gigabyte/ga-g41m-es2l: Tie in configuration for SuperIO EC
Arthur Heymans (arthur@aheymans.xyz)
gerrit at coreboot.org
Sat Nov 26 12:11:56 CET 2016
Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17602
-gerrit
commit ef3ed63d479617ea1259b4502bd5f605257500ea
Author: Damien Zammit <damien at zamaudio.com>
Date: Fri Nov 25 22:10:19 2016 +1100
mb/gigabyte/ga-g41m-es2l: Tie in configuration for SuperIO EC
Change-Id: Ifba821a7e355a0d6689f21c7f307e3901903a3fd
Signed-off-by: Damien Zammit <damien at zamaudio.com>
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb | 25 +++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
index bd80742..60004d2 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/devicetree.cb
@@ -82,6 +82,31 @@ chip northbridge/intel/x4x # Northbridge
device pci 1f.0 on # ISA bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8718f # Super I/O
+ register "TMPIN1" = "THERMAL_RESISTOR"
+ register "TMPIN2" = "THERMAL_RESISTOR"
+ register "TMPIN3" = "THERMAL_DIODE"
+ register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
+
+ register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
+ register "FAN1.smart.tmpin" = "3"
+ register "FAN1.smart.tmp_off" = "25"
+ register "FAN1.smart.tmp_start" = "30"
+ register "FAN1.smart.tmp_full" = "65"
+ register "FAN1.smart.tmp_delta" = "3"
+ register "FAN1.smart.smoothing" = "1"
+ register "FAN1.smart.pwm_start" = "0"
+ register "FAN1.smart.slope" = "10"
+
+ register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
+ register "FAN2.smart.tmpin" = "3"
+ register "FAN2.smart.tmp_off" = "25"
+ register "FAN2.smart.tmp_start" = "30"
+ register "FAN2.smart.tmp_full" = "65"
+ register "FAN2.smart.tmp_delta" = "3"
+ register "FAN2.smart.smoothing" = "1"
+ register "FAN2.smart.pwm_start" = "0"
+ register "FAN2.smart.slope" = "10"
+
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
More information about the coreboot-gerrit
mailing list