[coreboot-gerrit] Patch merged into coreboot/master: soc/intel: Use correct terminology for SPI flash operations

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit d0c00052d32ed2ea461811632197845120ca8a08
Author: Furquan Shaikh <furquan at chromium.org>
Date:   Mon Nov 21 09:19:53 2016 -0800

    soc/intel: Use correct terminology for SPI flash operations
    
    FPR is an attribute of the SPI flash component and not of the SPI bus
    itself. Rename functions, file names and Kconfig option to make sure
    this is conveyed correctly.
    
    BUG=None
    BRANCH=None
    TEST=Compiles successfully.
    
    Change-Id: I9f06f1a8ee28b8c56db64ddd6a19dd9179c54f50
    Signed-off-by: Furquan Shaikh <furquan at chromium.org>
    Reviewed-on: https://review.coreboot.org/17560
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/17560 for details.

-gerrit