[coreboot-gerrit] Patch merged into coreboot/master: riscv: map first 4GiB of physical address space

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 4e793ec358d2d2babf61e968e0836296ad2a9d71
Author: Ronald G. Minnich <rminnich at gmail.com>
Date:   Fri Nov 4 11:27:25 2016 -0700

    riscv: map first 4GiB of physical address space
    
    o The first 4G of physical address space is now mapped at 0.
    o The first 4G of physical address space is now mapped at 1 << 38.
    o The first 2G of DRAM (2 - 4 GiB of physical address space)
      is now mapped at the top of memory save for the last 4K
      i.e. at 0xffffffff80000000, with SBI page at the very top.
    
    Of these, we hope to remove the *most* of the
    last one once the gcc toolchain
    can handle linking programs that can run at "top 33 bits
    of address not all ones (but bit 63 set)". The 4K mapping
    of the top of the 64 bit address space will always remain,
    however, for SBI calls.
    
    Change-Id: I77b151720001bddad5563b0f8e1279abcea056fa
    Reviewed-on: https://review.coreboot.org/17403
    Tested-by: build bot (Jenkins)
    Reviewed-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>


See https://review.coreboot.org/17403 for details.

-gerrit