[coreboot-gerrit] Patch merged into coreboot/master: mainboard/google/reef: Update DPTF parameters provided from thermal team

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 51e238d3b4ace91bab9b6ae2a1c69409a0144205
Author: Tim Chen <Tim-Chen at quantatw.com>
Date:   Fri Nov 18 13:05:19 2016 +0800

    mainboard/google/reef: Update DPTF parameters provided from thermal team
    
    Update the DPTF parameters based on thermal test result.
    
    1. Update DPTF CPU/TSR0/TSR1/TSR2 passive/critial trigger points.
       CPU  passive point:61
       TSR0 passive point:120, critial point:125
       TSR1 passive point:46,  critial point:75
       TSR2 passive point:100, critial point:125
    
    2. Update PL1/PL2 Min Power Limit/Max Power Limit
       Set PL1 min to 3W, and max to 6W
       Set PL2 min to 8W
    
    3. Change thermal relationship table (TRT) setting.
       Change CPU Throttle Effect on CPU sample rate to 80secs
       Change CPU Effect on Temp Sensor 0 sample rate to 120secs
       The TRT of TCHG is TSR1, but real sensor is TSR2.
       Change Charger Effect on Temp Sensor 2 sample rate to 120secs
       Change CPU Effect on Temp Sensor 2 sample rate to 120secs
    
    BUG=chrome-os-partner:60038
    BRANCH=master
    TEST=build and boot on electro dut
    
    Change-Id: I7a701812cb45f51828a3cbb3343e03817645110e
    Signed-off-by: Tim Chen <Tim-Chen at quantatw.com>
    Reviewed-on: https://review.coreboot.org/17466
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/17466 for details.

-gerrit