[coreboot-gerrit] Patch set updated for coreboot: intel MMA: enabling MMA with FSP2.0

Pratikkumar V Prajapati (pratikkumar.v.prajapati@intel.com) gerrit at coreboot.org
Fri Nov 18 23:57:59 CET 2016


Pratikkumar V Prajapati (pratikkumar.v.prajapati at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17496

-gerrit

commit e33962a540d935015d0398e64cf7ffa7fc841766
Author: Pratik Prajapati <pratikkumar.v.prajapati at intel.com>
Date:   Fri Nov 18 14:36:34 2016 -0800

    intel MMA: enabling MMA with FSP2.0
    
    Separating mma code for fsp1.1 and fsp2.0.
    common code is placed in mma_core.c and mma.h
    mma_fsp<ver>.h and .c contains fsp version specific code.
    romstage_fsp20.c calls mma init for fsp2.0 and whole MMA
    feature is guarded by CONFIG_MMA flag.
    
    Change-Id: I12c9a1122ea7a52f050b852738fb95d03ce44800
    Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati at intel.com>
---
 src/soc/intel/common/Makefile.inc               |  22 +++-
 src/soc/intel/common/mma.h                      |  29 ++++-
 src/soc/intel/common/mma_core.c                 | 126 +++++++++++++++++++
 src/soc/intel/common/mma_fsp11.c                | 159 ++++++++++++++++++++++++
 src/soc/intel/common/mma_fsp11.h                |  24 ++++
 src/soc/intel/common/mma_fsp20.c                | 154 +++++++++++++++++++++++
 src/soc/intel/common/mma_fsp20.h                |  24 ++++
 src/soc/intel/skylake/romstage/romstage_fsp20.c |   5 +
 8 files changed, 539 insertions(+), 4 deletions(-)

diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index 38903a0..32858a7 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -12,7 +12,16 @@ romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
 romstage-y += util.c
-romstage-$(CONFIG_MMA) += mma.c
+ifeq ($(CONFIG_MMA),y)
+	romstage-y += mma_core.c
+	ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
+		romstage-y += mma_fsp20.c
+	else ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y)
+		romstage-y += mma_fsp11.c
+	else
+	$(error FSP version not defined or unsupported for MMA romstage)
+	endif
+endif
 
 postcar-y += util.c
 postcar-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
@@ -24,7 +33,16 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_SPI_PROTECT) += spi.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_LPSS_I2C) += lpss_i2c.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_RESET) += reset.c
 ramstage-y += util.c
-ramstage-$(CONFIG_MMA) += mma.c
+ifeq ($(CONFIG_MMA),y)
+	ramstage-y += mma_core.c
+	ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
+		ramstage-y += mma_fsp20.c
+	else ifeq ($(CONFIG_PLATFORM_USES_FSP1_1),y)
+	ramstage-y += mma_fsp11.c
+	else
+	$(error FSP version not defined or unsupported for MMA ramstage)
+	endif
+endif
 ramstage-$(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE) += acpi_wake_source.c
 ramstage-y += vbt.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_GFX_OPREGION) += opregion.c
diff --git a/src/soc/intel/common/mma.h b/src/soc/intel/common/mma.h
index f1c91e2..759df35 100644
--- a/src/soc/intel/common/mma.h
+++ b/src/soc/intel/common/mma.h
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2015 Intel Corporation.
+ * Copyright (C) 2016 Intel Corporation.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -16,8 +16,33 @@
 #ifndef _SOC_MMA_H_
 #define _SOC_MMA_H_
 
+#define MMA_TEST_METADATA_FILENAME	"mma_test_metadata.bin"
+#define MMA_TEST_NAME_TAG		"MMA_TEST_NAME"
+#define MMA_TEST_PARAM_TAG		"MMA_TEST_PARAM"
+#define TEST_NAME_MAX_SIZE		30
+#define TEST_PARAM_MAX_SIZE		100
+#define MMA_DATA_SIGNATURE		(('M'<<0)|('M'<<8)|('A'<<16)|('D'<<24))
+#define MMA_CBFS_REGION			"COREBOOT"
+
 #include <fsp/soc_binding.h>
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP2_0)
+#include <soc/intel/common/mma_fsp20.h>
+#elif IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
+#include <soc/intel/common/mma_fsp11.h>
+#else
+#error "error FSP version not defined or unsupported for MMA romstage"
+#endif
+
+struct mma_data_container {
+	u32     mma_signature;  // "MMAD"
+	u8      mma_data[0];    // Variable size, platform/run time dependent.
+} __attribute__ ((packed));
 
-void setup_mma(MEMORY_INIT_UPD *memory_params);
+int find_label(const char *haystack, size_t haystack_sz,
+		const char *label);
+int label_value(const char *haystack, size_t haystack_sz,
+			const char *label, char *dest, size_t dest_sz);
+void *cbfs_locate_file_in_region(const char *region_name,
+	const char *file_name, uint32_t file_type, uint32_t *file_size);
 
 #endif
diff --git a/src/soc/intel/common/mma_core.c b/src/soc/intel/common/mma_core.c
new file mode 100644
index 0000000..1226214
--- /dev/null
+++ b/src/soc/intel/common/mma_core.c
@@ -0,0 +1,126 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <boot/coreboot_tables.h>
+#include <bootstate.h>
+#include <cbfs.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <fmap.h>
+#include <lib.h>
+#include <soc/intel/common/mma.h>
+#include <soc/romstage.h>
+#include <string.h>
+
+/*
+Format of the MMA test metadata file, stored under CBFS
+MMA_TEST_NAME=xxxxxx.efi;MMA_TEST_PARAM=xxxxxx.bin;
+*/
+
+/* Returns index in haystack after 'LABEL=' string is found, < 0 on error. */
+int find_label(const char *haystack, size_t haystack_sz,
+		const char *label)
+{
+	size_t label_sz;
+	size_t i;
+	size_t search_sz;
+
+	label_sz = strlen(label);
+
+	if (label_sz + 1 >= haystack_sz)
+		return -1;
+
+	/* Handle '=' follow label. i.e. LABEL= */
+	search_sz = haystack_sz - label_sz - 1;
+	for (i = 0; i < search_sz; i++) {
+		if (!strncmp(&haystack[i], label, label_sz))
+			break;
+	}
+
+	if (i == search_sz)
+		return -1;
+
+	if (haystack[i + label_sz] != '=')
+		return -1;
+
+	return i + label_sz + 1;
+}
+/*
+ * Fill in value in dest field located by LABEL=.
+ *	Returns 0 on success, < 0 on  error.
+ */
+int label_value(const char *haystack, size_t haystack_sz,
+			const char *label, char *dest, size_t dest_sz)
+{
+	size_t val_begin;
+	size_t val_end;
+	size_t val_sz;
+	int val_index;
+
+	memset(dest, 0, dest_sz);
+
+	/* Allow for NULL termination. */
+	dest_sz--;
+	val_index = find_label(haystack, haystack_sz, label);
+	if (val_index < 0)
+		return -1;
+
+	val_begin = val_index;
+	val_end = val_begin;
+	val_sz = 0;
+
+	for (val_end = val_begin; val_end < haystack_sz; val_end++) {
+		if (haystack[val_end] == ';') {
+			val_sz = val_end - val_begin;
+			break;
+		}
+	}
+
+	if (val_end == haystack_sz)
+		return -1;
+
+	if (dest_sz < val_sz)
+		return -1;
+
+	memcpy(dest, &haystack[val_begin], val_sz);
+
+	return 0;
+}
+
+void *cbfs_locate_file_in_region(const char *region_name, const char *file_name,
+	uint32_t file_type, uint32_t *file_size)
+{
+	struct region_device rdev;
+	struct cbfsf fh;
+
+	if (file_size != NULL)
+		*file_size = 0;
+
+	if (fmap_locate_area_as_rdev(region_name, &rdev) == 0) {
+		if (cbfs_locate(&fh, &rdev, file_name, &file_type) == 0) {
+			if (file_size != NULL)
+				*file_size = region_device_sz(&fh.data);
+			return rdev_mmap_full(&fh.data);
+		} else {
+			printk(BIOS_DEBUG, "%s file not found in %s region\n",
+				file_name, region_name);
+		}
+	} else {
+		printk(BIOS_DEBUG, "%s region not found while looking for %s\n",
+			region_name, file_name);
+	}
+
+	return NULL;
+}
diff --git a/src/soc/intel/common/mma_fsp11.c b/src/soc/intel/common/mma_fsp11.c
new file mode 100644
index 0000000..b457415
--- /dev/null
+++ b/src/soc/intel/common/mma_fsp11.c
@@ -0,0 +1,159 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <boot/coreboot_tables.h>
+#include <bootstate.h>
+#include <cbfs.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <fmap.h>
+#include <lib.h>
+#include <soc/intel/common/mma.h>
+#include <soc/romstage.h>
+#include <string.h>
+
+void setup_mma(MEMORY_INIT_UPD *memory_params)
+{
+	void *mma_test_metadata, *mma_test_content, *mma_test_param;
+	size_t mma_test_metadata_file_len, mma_test_content_file_len,
+		mma_test_param_file_len;
+	char test_filename[TEST_NAME_MAX_SIZE],
+		test_param_filename[TEST_PARAM_MAX_SIZE];
+
+	printk(BIOS_DEBUG, "Entry setup_mma\n");
+
+	memory_params->MmaTestContentPtr = 0;
+	memory_params->MmaTestContentSize = 0;
+	memory_params->MmaTestConfigPtr = 0;
+	memory_params->MmaTestConfigSize = 0;
+
+	mma_test_metadata = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				MMA_TEST_METADATA_FILENAME, CBFS_TYPE_MMA,
+				&mma_test_metadata_file_len);
+
+	if (!mma_test_metadata) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s\n",
+				MMA_TEST_METADATA_FILENAME);
+		return;
+	}
+
+	if (label_value(mma_test_metadata, mma_test_metadata_file_len,
+			MMA_TEST_NAME_TAG, test_filename, TEST_NAME_MAX_SIZE)) {
+		printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s",
+					MMA_TEST_NAME_TAG);
+		return;
+	}
+
+	if (label_value(mma_test_metadata, mma_test_metadata_file_len,
+			MMA_TEST_PARAM_TAG, test_param_filename,
+			TEST_PARAM_MAX_SIZE)) {
+		printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s",
+			MMA_TEST_PARAM_TAG);
+		return;
+	}
+
+	printk(BIOS_DEBUG, "Got MMA_TEST_NAME=%s MMA_TEST_PARAM=%s\n",
+			test_filename, test_param_filename);
+
+	mma_test_content = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				test_filename, CBFS_TYPE_EFI,
+				&mma_test_content_file_len);
+	if (!mma_test_content) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n",
+		test_filename);
+		return;
+	}
+
+	mma_test_param = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				test_param_filename, CBFS_TYPE_MMA,
+				&mma_test_param_file_len);
+	if (!mma_test_param) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n",
+				test_param_filename);
+		return;
+	}
+
+	memory_params->MmaTestContentPtr = (uintptr_t) mma_test_content;
+	memory_params->MmaTestContentSize = mma_test_content_file_len;
+	memory_params->MmaTestConfigPtr = (uintptr_t) mma_test_param;
+	memory_params->MmaTestConfigSize = mma_test_param_file_len;
+	memory_params->MrcFastBoot = 0x00;
+	memory_params->SaGv = 0x02;
+
+	printk(BIOS_DEBUG, "MMA Test name %s\n", test_filename);
+	printk(BIOS_DEBUG, "MMA Test Config name %s\n", test_param_filename);
+	printk(BIOS_DEBUG, "MMA passing following memory_params\n");
+	printk(BIOS_DEBUG, "memory_params->MmaTestContentPtr = %0x\n",
+			memory_params->MmaTestContentPtr);
+	printk(BIOS_DEBUG, "memory_params->MmaTestContentSize = %d\n",
+			memory_params->MmaTestContentSize);
+	printk(BIOS_DEBUG, "memory_params->MmaTestConfigPtr = %0x\n",
+			memory_params->MmaTestConfigPtr);
+	printk(BIOS_DEBUG, "memory_params->MmaTestConfigSize = %d\n",
+			memory_params->MmaTestConfigSize);
+	printk(BIOS_DEBUG, "memory_params->MrcFastBoot = %d\n",
+			memory_params->MrcFastBoot);
+	printk(BIOS_DEBUG, "memory_params->SaGv = %d\n",
+			memory_params->SaGv);
+
+	printk(BIOS_DEBUG, "MMA setup successfully\n");
+}
+
+
+static void save_mma_results_data(void *unused)
+{
+	void *mma_results_hob;
+	u32 mma_hob_size;
+	u32 *mma_hob_data;
+	struct mma_data_container *mma_data;
+	int cbmem_size;
+
+	const EFI_GUID mma_results_guid = FSP_MMA_RESULTS_GUID;
+
+	printk(BIOS_DEBUG, "Entry save_mma_results_data MMA save data.\n");
+
+	mma_results_hob = get_first_guid_hob(&mma_results_guid);
+	if (mma_results_hob == NULL) {
+		printk(BIOS_DEBUG,
+				"MMA results data Hob not present\n");
+		return;
+	}
+
+	mma_hob_data = GET_GUID_HOB_DATA(mma_results_hob);
+	mma_hob_size = GET_HOB_LENGTH(mma_results_hob);
+	cbmem_size = ALIGN(mma_hob_size, 16) +
+			sizeof(struct mma_data_container);
+	mma_data = cbmem_add(CBMEM_ID_MMA_DATA, cbmem_size);
+
+	if (mma_data == NULL) {
+		printk(BIOS_DEBUG,
+			"CBMEM was not available to save the MMA data.\n");
+		return;
+	}
+
+	/*clear the mma_data before coping the actual data */
+	memset(mma_data, 0, cbmem_size);
+
+	printk(BIOS_DEBUG,
+		"Copy MMA DATA to HOB(src addr %p, dest addr %p, %u bytes)\n",
+			mma_hob_data, mma_data, mma_hob_size);
+
+	mma_data->mma_signature = MMA_DATA_SIGNATURE;
+	memcpy(mma_data->mma_data, mma_hob_data, mma_hob_size);
+
+	printk(BIOS_DEBUG, "write MMA results data to cbmem success\n");
+}
+
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
+			save_mma_results_data, NULL);
diff --git a/src/soc/intel/common/mma_fsp11.h b/src/soc/intel/common/mma_fsp11.h
new file mode 100644
index 0000000..2406f82
--- /dev/null
+++ b/src/soc/intel/common/mma_fsp11.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_MMA_FSP11_H_
+#define _SOC_MMA_FSP11_H_
+
+#define FSP_MMA_RESULTS_GUID	{ 0x8f4e928, 0xf5f, 0x46d4, \
+		{ 0x84, 0x10, 0x47, 0x9f, 0xda, 0x27, 0x9d, 0xb6 } }
+
+void setup_mma(MEMORY_INIT_UPD *memory_params);
+
+#endif
diff --git a/src/soc/intel/common/mma_fsp20.c b/src/soc/intel/common/mma_fsp20.c
new file mode 100644
index 0000000..a13b29f
--- /dev/null
+++ b/src/soc/intel/common/mma_fsp20.c
@@ -0,0 +1,154 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <boot/coreboot_tables.h>
+#include <cbfs.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <fsp/util.h>
+#include <soc/intel/common/mma.h>
+#include <soc/romstage.h>
+
+void setup_mma(FSP_M_CONFIG *memory_params)
+{
+	void *mma_test_metadata, *mma_test_content, *mma_test_param;
+	size_t mma_test_metadata_file_len, mma_test_content_file_len,
+		mma_test_param_file_len;
+	char test_filename[TEST_NAME_MAX_SIZE],
+		test_param_filename[TEST_PARAM_MAX_SIZE];
+
+	printk(BIOS_DEBUG, "Entry setup_mma\n");
+
+	memory_params->MmaTestContentPtr = 0;
+	memory_params->MmaTestContentSize = 0;
+	memory_params->MmaTestConfigPtr = 0;
+	memory_params->MmaTestConfigSize = 0;
+
+	mma_test_metadata = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				MMA_TEST_METADATA_FILENAME, CBFS_TYPE_MMA,
+				&mma_test_metadata_file_len);
+
+	if (!mma_test_metadata) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s\n",
+				MMA_TEST_METADATA_FILENAME);
+		return;
+	}
+
+	if (label_value(mma_test_metadata, mma_test_metadata_file_len,
+			MMA_TEST_NAME_TAG, test_filename, TEST_NAME_MAX_SIZE)) {
+		printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s",
+				MMA_TEST_NAME_TAG);
+		return;
+	}
+
+	if (label_value(mma_test_metadata, mma_test_metadata_file_len,
+			MMA_TEST_PARAM_TAG, test_param_filename,
+			TEST_PARAM_MAX_SIZE)) {
+		printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s",
+			MMA_TEST_PARAM_TAG);
+		return;
+	}
+
+	printk(BIOS_DEBUG, "Got MMA_TEST_NAME=%s MMA_TEST_PARAM=%s\n",
+			test_filename, test_param_filename);
+
+	mma_test_content = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				test_filename, CBFS_TYPE_EFI,
+				&mma_test_content_file_len);
+	if (!mma_test_content) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n",
+		test_filename);
+		return;
+	}
+
+	mma_test_param = cbfs_locate_file_in_region(MMA_CBFS_REGION,
+				test_param_filename, CBFS_TYPE_MMA,
+				&mma_test_param_file_len);
+	if (!mma_test_param) {
+		printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n",
+				test_param_filename);
+		return;
+	}
+
+	memory_params->MmaTestContentPtr = (uintptr_t) mma_test_content;
+	memory_params->MmaTestContentSize = mma_test_content_file_len;
+	memory_params->MmaTestConfigPtr = (uintptr_t) mma_test_param;
+	memory_params->MmaTestConfigSize = mma_test_param_file_len;
+	memory_params->MrcFastBoot = 0x00;
+	memory_params->SaGv = 0x02;
+
+	printk(BIOS_DEBUG, "MMA Test name %s\n", test_filename);
+	printk(BIOS_DEBUG, "MMA Test Config name %s\n", test_param_filename);
+	printk(BIOS_DEBUG, "MMA passing following memory_params\n");
+	printk(BIOS_DEBUG, "memory_params->MmaTestContentPtr = %0x\n",
+			memory_params->MmaTestContentPtr);
+	printk(BIOS_DEBUG, "memory_params->MmaTestContentSize = %d\n",
+			memory_params->MmaTestContentSize);
+	printk(BIOS_DEBUG, "memory_params->MmaTestConfigPtr = %0x\n",
+			memory_params->MmaTestConfigPtr);
+	printk(BIOS_DEBUG, "memory_params->MmaTestConfigSize = %d\n",
+			memory_params->MmaTestConfigSize);
+	printk(BIOS_DEBUG, "memory_params->MrcFastBoot = %d\n",
+			memory_params->MrcFastBoot);
+	printk(BIOS_DEBUG, "memory_params->SaGv = %d\n",
+			memory_params->SaGv);
+
+	printk(BIOS_DEBUG, "MMA setup successfully\n");
+}
+
+static void save_mma_results_data(void *unused)
+{
+	const void *mma_hob_data;
+	u32 mma_hob_size;
+	struct mma_data_container *mma_data;
+	int cbmem_size;
+
+	printk(BIOS_DEBUG, "Entry save_mma_results_data MMA save data.\n");
+
+	mma_hob_data = fsp_find_extension_hob_by_guid(mma_results_uuid,
+				&mma_hob_size);
+
+	if (mma_hob_data == NULL) {
+		printk(BIOS_DEBUG,
+				"MMA results data Hob not present\n");
+		return;
+	}
+
+	cbmem_size = ALIGN(mma_hob_size, 16) +
+			sizeof(struct mma_data_container);
+	mma_data = cbmem_add(CBMEM_ID_MMA_DATA, cbmem_size);
+
+	if (mma_data == NULL) {
+		printk(BIOS_DEBUG,
+			"CBMEM was not available to save the MMA data.\n");
+		return;
+	}
+
+	/*clear the mma_data before coping the actual data */
+	memset(mma_data, 0, cbmem_size);
+
+	printk(BIOS_DEBUG,
+		"Copy MMA DATA to HOB(src addr %p, dest addr %p, %u bytes)\n",
+			mma_hob_data, mma_data, mma_hob_size);
+
+	mma_data->mma_signature = MMA_DATA_SIGNATURE;
+	memcpy(mma_data->mma_data, mma_hob_data, mma_hob_size);
+
+	printk(BIOS_DEBUG, "write MMA results data to cbmem success\n");
+}
+
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
+			save_mma_results_data, NULL);
diff --git a/src/soc/intel/common/mma_fsp20.h b/src/soc/intel/common/mma_fsp20.h
new file mode 100644
index 0000000..31a5955
--- /dev/null
+++ b/src/soc/intel/common/mma_fsp20.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _SOC_MMA_FSP20_H_
+#define _SOC_MMA_FSP20_H_
+
+static const uint8_t mma_results_uuid[16] = { 0x28, 0xe9, 0xf4, 0x08,
+		0x5f, 0x0f, 0xd4, 0x46,
+		0x84, 0x10, 0x47, 0x9f, 0xda, 0x27, 0x9d, 0xb6 };
+void setup_mma(FSP_M_CONFIG *mupd);
+
+#endif
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 8e08323..e1d5629 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -25,6 +25,7 @@
 #include <device/pci_def.h>
 #include <fsp/util.h>
 #include <fsp/memmap.h>
+#include <soc/intel/common/mma.h>
 #include <soc/pci_devs.h>
 #include <soc/pm.h>
 #include <soc/romstage.h>
@@ -130,6 +131,10 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg)
 			mask |= (1<<i);
 	}
 	m_cfg->PcieRpEnableMask = mask;
+
+	if (IS_ENABLED(CONFIG_MMA))
+		setup_mma(m_cfg);
+
 }
 
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd)



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