[coreboot-gerrit] Patch merged into coreboot/master: rtc: Force negative edge on SET after battery replacement

gerrit at coreboot.org gerrit at coreboot.org
Thu Nov 17 23:09:05 CET 2016


the following patch was just integrated into master:
commit f8a274acf53217129460b5a487396761c174bd54
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Sat Nov 5 18:47:51 2016 -0600

    rtc: Force negative edge on SET after battery replacement
    
    After the RTC coin cell has been replaced, the Update Cycle Inhibit
    bit must see at least one low transition to ensure the RTC counts.
    The reset value for this bit is undefined. Examples have been observed
    where batteries are installed on a manufacturing line, the bit's state
    comes up low, but the RTC does not count.
    
    Change-Id: I05f61efdf941297fa9ec90136124b0c8fe0639c6
    Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Reviewed-on: https://review.coreboot.org/17370
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>


See https://review.coreboot.org/17370 for details.

-gerrit



More information about the coreboot-gerrit mailing list