[coreboot-gerrit] New patch to review for coreboot: reef: disable unused devices
Jagadish Krishnamoorthy (jagadish.krishnamoorthy@intel.com)
gerrit at coreboot.org
Wed Nov 16 01:19:04 CET 2016
Jagadish Krishnamoorthy (jagadish.krishnamoorthy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17441
-gerrit
commit 5ccb400d1e2e1a24a7c343604fae9215f2113392
Author: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Date: Tue Nov 15 12:06:21 2016 -0800
reef: disable unused devices
The following devices i2c6, i2c7, spi1, spi2, uart3
are not used.
BUG=chrome-os-partner:59880
TEST=Boot to OS and lspci command should
not list the above disable devices.
Change-Id: I819cdb34709703e6431b49446417ed9d6b3543cd
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
---
src/mainboard/google/reef/variants/baseboard/devicetree.cb | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 278cc57..f10b5db 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -203,15 +203,15 @@ chip soc/intel/apollolake
device i2c 0x9 on end
end
end # - I2C 5
- device pci 17.2 on end # - I2C 6
- device pci 17.3 on end # - I2C 7
+ device pci 17.2 off end # - I2C 6
+ device pci 17.3 off end # - I2C 7
device pci 18.0 on end # - UART 0
device pci 18.1 on end # - UART 1
device pci 18.2 on end # - UART 2
- device pci 18.3 on end # - UART 3
+ device pci 18.3 off end # - UART 3
device pci 19.0 on end # - SPI 0
- device pci 19.1 on end # - SPI 1
- device pci 19.2 on end # - SPI 2
+ device pci 19.1 off end # - SPI 1
+ device pci 19.2 off end # - SPI 2
device pci 1a.0 on end # - PWM
device pci 1b.0 on end # - SDCARD
device pci 1c.0 on end # - eMMC
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