[coreboot-gerrit] Patch merged into coreboot/master: intel/apollolake: Ensure SPI operations do not cross 256-byte boundary
gerrit at coreboot.org
gerrit at coreboot.org
Tue Nov 15 22:21:12 CET 2016
the following patch was just integrated into master:
commit 0530b299212b4d584571ab588ad1d750ae57e251
Author: Furquan Shaikh <furquan at chromium.org>
Date: Mon Nov 14 13:49:56 2016 -0800
intel/apollolake: Ensure SPI operations do not cross 256-byte boundary
BIOS needs to ensure that SPI write does not cross 256-byte
boundary. Else, if the write is across 256-byte boundary, then it
corrupts the block by wrapping write to start of current block. Thus,
ensure nuclear_spi_{read,write} operate within a single 256-byte block
only at a time.
BUG=chrome-os-partner:59813
BRANCH=None
TEST=Verified that elog writes do not corrupt the event log when write
is across 256-byte blocks.
Change-Id: I854ca2979d65b9f1232f93182cb84d4dee4f4139
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
Reviewed-on: https://review.coreboot.org/17419
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/17419 for details.
-gerrit
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