[coreboot-gerrit] New patch to review for coreboot: reef: tune audio i2c frequency to 400kHz

[Jagadish Krishnamoorthy (jagadish.krishnamoorthy@intel.com)]

Jagadish Krishnamoorthy (jagadish.krishnamoorthy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17420

-gerrit

commit 5c52e15d37bff5fbc05282ec4b38152ea6a3a054
Author: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Date:   Mon Nov 14 14:55:08 2016 -0800

    reef: tune audio i2c frequency to 400kHz
    
    This brings the frequency down to 400kHz which is spec for
    fast i2c.
    
    BUG=chrome-os-partner:59565
    
    Change-Id: Idb277ad17720c455407c6817e713d977c49f8465
    Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
---
 src/mainboard/google/reef/variants/baseboard/devicetree.cb | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index 278cc57..0e166e4 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -71,6 +71,17 @@ chip soc/intel/apollolake
 	register "gpe0_dw2" = "PMC_GPE_N_63_32"
 	register "gpe0_dw3" = "PMC_GPE_SW_31_0"
 
+	# Limit audio speed to 400kHz with manually tuned values.
+	register "i2c[0]" = "{
+		.speed = I2C_SPEED_FAST,
+		.speed_config[0] = {
+			.speed = I2C_SPEED_FAST,
+			.scl_lcnt = 0xd0,
+			.scl_hcnt = 0x68,
+			.sda_hold = 0x27,
+		}
+	}"
+
 	# Enable I2C2 bus early for TPM access and configure as 400kHz
 	# with manually tuned values.
 	register "i2c[2]" = "{