[coreboot-gerrit] Patch set updated for coreboot: rtc: Check update-in-progress bit

Marshall Dawson (marshalldawson3rd@gmail.com) gerrit at coreboot.org
Sat Nov 12 23:48:48 CET 2016


Marshall Dawson (marshalldawson3rd at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17369

-gerrit

commit a31dd5690f3902fa3d73802b2d6a23b8baed9142
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Sat Nov 5 18:31:33 2016 -0600

    rtc: Check update-in-progress bit
    
    While the real-time clock updates its count, values may not be correctly
    read or written.  On reads, ensure the UIP bit is clear which guarantees
    a minimum of 488 microseconds exists before the update begins.  Writes
    already avoid the problem by disabling the RTC count via the SET bit.
    
    Change-Id: I39e34493113015d32582f1c280fafa9e97f43a40
    Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
---
 src/drivers/pc80/rtc/mc146818rtc.c | 2 ++
 src/include/pc80/mc146818rtc.h     | 6 ++++++
 2 files changed, 8 insertions(+)

diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 5fb9cf6..c3026a4 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -360,6 +360,7 @@ void cmos_check_update_date(void)
 	u8 year, century;
 
 	/* Assume hardware always supports RTC_CLK_ALTCENTURY. */
+	wait_uip();
 	century = cmos_read(RTC_CLK_ALTCENTURY);
 	year = cmos_read(RTC_CLK_YEAR);
 
@@ -388,6 +389,7 @@ int rtc_set(const struct rtc_time *time)
 
 int rtc_get(struct rtc_time *time)
 {
+	wait_uip();
 	time->sec = bcd2bin(cmos_read(RTC_CLK_SECOND));
 	time->min = bcd2bin(cmos_read(RTC_CLK_MINUTE));
 	time->hour = bcd2bin(cmos_read(RTC_CLK_HOUR));
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index effc03d..3d8cf2f 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -112,6 +112,12 @@ static inline unsigned char cmos_read(unsigned char addr)
 	return inb(RTC_BASE_PORT + offs + 1);
 }
 
+static inline void wait_uip(void)
+{
+	while (cmos_read(RTC_REG_A) & RTC_UIP)
+		;
+}
+
 static inline void cmos_write_inner(unsigned char val, unsigned char addr)
 {
 	int offs = 0;



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