[coreboot-gerrit] Patch set updated for coreboot: riscv: start to use the configstring functions

[Ronald G. Minnich (rminnich@gmail.com)]

Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17256

-gerrit

commit 3aa3666370084d7575446502a7696064a35a2377
Author: Ronald G. Minnich <rminnich at gmail.com>
Date:   Sun Nov 6 20:54:20 2016 -0800

    riscv: start to use the configstring functions
    
    These functions will allow us to remove hardcodes,
    as long as we can verify the qemu and lowrisc targets
    implement the configstring correctly. Hence, for the
    most part, we'll start with mainboard changes first.
    
    Change-Id: I7dd3f553d3e61f1c49752fb04402b134fdfdf979
    Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
---
 src/arch/riscv/Kconfig                         | 5 +++++
 src/arch/riscv/Makefile.inc                    | 9 ++++++---
 src/arch/riscv/boot.c                          | 7 +++++--
 src/commonlib/configstring.c                   | 3 +--
 src/mainboard/emulation/spike-riscv/romstage.c | 6 ++++++
 5 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig
index a30cb70..f05a98b 100644
--- a/src/arch/riscv/Kconfig
+++ b/src/arch/riscv/Kconfig
@@ -19,3 +19,8 @@ config ARCH_ROMSTAGE_RISCV
 config ARCH_RAMSTAGE_RISCV
 	bool
 	default n
+
+config RISCV_CONFIGSTRING
+	hex "Location of pointer to RISCV config string"
+	default 0x100c
+	depends on ARCH_RISCV
diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 1fe8f7c..c68fd1e 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -43,7 +43,8 @@ bootblock-y += \
 	$(top)/src/lib/memcmp.c \
 	$(top)/src/lib/memcpy.c \
 	$(top)/src/lib/memmove.c \
-	$(top)/src/lib/memset.c
+	$(top)/src/lib/memset.c \
+	$(top)/src/commonlib/configstring.c
 
 $(objcbfs)/bootblock.debug: $$(bootblock-objs)
 	@printf "    LINK       $(subst $(obj)/,,$(@))\n"
@@ -69,7 +70,8 @@ romstage-y += \
 	$(top)/src/lib/memcmp.c \
 	$(top)/src/lib/memcpy.c \
 	$(top)/src/lib/memmove.c \
-	$(top)/src/lib/memset.c
+	$(top)/src/lib/memset.c \
+	$(top)/src/commonlib/configstring.c
 
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 
@@ -102,7 +104,8 @@ ramstage-y += \
 	$(top)/src/lib/memcmp.c \
 	$(top)/src/lib/memcpy.c \
 	$(top)/src/lib/memmove.c \
-	$(top)/src/lib/memset.c
+	$(top)/src/lib/memset.c \
+	$(top)/src/commonlib/configstring.c
 
 $(eval $(call create_class_compiler,rmodules,riscv))
 
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index ff1844e..9483c48 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -18,16 +18,19 @@
 #include <arch/encoding.h>
 #include <rules.h>
 #include <console/console.h>
+#include <commonlib/configstring.h>
 
 void arch_prog_run(struct prog *prog)
 {
 	void (*doit)(void *) = prog_entry(prog);
-	void riscvpayload(void *);
+	void riscvpayload(const char *configstring, void *payload);
+	const char *config = configstring();
 
 	if (ENV_RAMSTAGE && prog_type(prog) == PROG_PAYLOAD) {
+		printk(BIOS_SPEW, "Config string: '%s'\n", config);
 		initVirtualMemory();
 		printk(BIOS_SPEW, "OK, let's go\n");
-		riscvpayload(doit);
+		riscvpayload(config, doit);
 	}
 
 	doit(prog_entry_arg(prog));
diff --git a/src/commonlib/configstring.c b/src/commonlib/configstring.c
index 40beb16..4eca6af 100644
--- a/src/commonlib/configstring.c
+++ b/src/commonlib/configstring.c
@@ -28,7 +28,6 @@
  */
 
 #include <config.h>
-#include <assert.h>
 #include <string.h>
 #include <commonlib/configstring.h>
 
@@ -49,6 +48,6 @@ void query_rtc(const char *config_string, uintptr_t *mtime)
 
 const char *configstring(void)
 {
-	uint32_t addr = *(uint32_t *)CONFIG_ARCH_CONFIGSTRING_RISCV;
+	uint32_t addr = *(uint32_t *)CONFIG_RISCV_CONFIGSTRING;
 	return (const char *)(uintptr_t)addr;
 }
diff --git a/src/mainboard/emulation/spike-riscv/romstage.c b/src/mainboard/emulation/spike-riscv/romstage.c
index b6314ccd..dccdf22 100644
--- a/src/mainboard/emulation/spike-riscv/romstage.c
+++ b/src/mainboard/emulation/spike-riscv/romstage.c
@@ -15,9 +15,15 @@
 
 #include <console/console.h>
 #include <program_loading.h>
+#include <commonlib/configstring.h>
 
 void main(void)
 {
+	uintptr_t base;
+	size_t size;
+
 	console_init();
+	query_mem(configstring(), &base, &size);
+	printk(BIOS_SPEW, "0x%zx bytes of memory at 0x%llx\n", size, base);
 	run_ramstage();
 }