[coreboot-gerrit] Patch set updated for coreboot: skylake: Update the thermal time window for throttling action

[Sumeet R Pawnikar (sumeet.r.pawnikar@intel.com)]

Sumeet R Pawnikar (sumeet.r.pawnikar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17384

-gerrit

commit 097fd1798f8fc0db5a670733c2e38a7b84c68fd3
Author: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
Date:   Fri Nov 11 17:11:28 2016 +0530

    skylake: Update the thermal time window for throttling action
    
    This patch reduces the thermal time window to 100 milliseconds
    for fast throttling action at prochot.
    
    BUG=chrome-os-partner:59397
    BRANCH=None.
    TEST=Built for skylake platform and verified the thermal time
    window value.
    
    Change-Id: If79d213cb8e19277ffdb882267d2f8672df93446
    Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
 src/soc/intel/skylake/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 83ec61d..3ec8d2c 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -205,6 +205,10 @@ static void configure_thermal_target(void)
 		msr.lo |= (conf->tcc_offset & 0xf) << 24;
 		wrmsr(MSR_TEMPERATURE_TARGET, msr);
 	}
+	msr = rdmsr(MSR_TEMPERATURE_TARGET);
+	msr.lo &= ~0x7f; /* Bits 6:0 */
+	msr.lo |= 0xe6; /* setting 100ms thermal time window */
+	wrmsr(MSR_TEMPERATURE_TARGET, msr);
 }
 
 static void configure_isst(void)