[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge: Lock PAVPC

[Nico Huber (nico.h@gmx.de)]

Nico Huber (nico.h at gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17352

-gerrit

commit 7a22a80747f954a24a85f614faaf18ed969306f0
Author: Dennis Wassenberg <dennis.wassenberg at secunet.com>
Date:   Wed Nov 2 08:12:52 2016 +0100

    nb/intel/sandybridge: Lock PAVPC
    
    This makes CHIPSEC happy. We don't enable PAVP, but it shouldn't hurt
    to lock it nevertheless.
    
    Change-Id: I9428f0b6e8868832eb79f7aea24cbc7961c2aa8f
    Signed-off-by: Dennis Wassenberg <dennis.wassenberg at secunet.com>
---
 src/northbridge/intel/sandybridge/finalize.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index 93f6261..21bf9da 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -23,6 +23,7 @@
 void intel_sandybridge_finalize_smm(void)
 {
 	pci_or_config16(PCI_DEV_SNB, 0x50, 1 << 0);	/* GGC */
+	pci_or_config16(PCI_DEV_SNB, 0x58, 1 << 2);	/* PAVP Lock */
 	pci_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0);	/* DPR */
 	pci_or_config32(PCI_DEV_SNB, 0x78, 1 << 10);	/* ME */
 	pci_or_config32(PCI_DEV_SNB, 0x90, 1 << 0);	/* REMAPBASE */