[coreboot-gerrit] Patch set updated for coreboot: lpss_i2c: Increase transaction timeout

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17213

-gerrit

commit 5e32de883fa3b3d7d2c74a4516aececcbea715a8
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Thu Nov 3 10:43:14 2016 -0700

    lpss_i2c: Increase transaction timeout
    
    When doing long transcations on an I2C bus at standard speed we saw
    that long transactions could go over the 4ms limit while waiting for
    it to complete on the bus.
    
    Increase this so we can use standard speed for testing and debug in
    firmware.  (as there is no way to force standard speed in the kernel)
    
    BUG=chrome-os-partner:58666
    TEST=boot eve board with cr50 TPM and I2C bus at 100khz
    
    Change-Id: I2987ae6a5aa024b373eb088767194c70b0918b6f
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/common/lpss_i2c.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/common/lpss_i2c.c b/src/soc/intel/common/lpss_i2c.c
index 0174792..58d44b8 100644
--- a/src/soc/intel/common/lpss_i2c.c
+++ b/src/soc/intel/common/lpss_i2c.c
@@ -73,8 +73,8 @@ struct lpss_i2c_regs {
 	uint32_t comp_type;
 } __attribute__((packed));
 
-/* Use a ~4ms timeout for various operations */
-#define LPSS_I2C_TIMEOUT_US		4000
+/* Use a ~10ms timeout for various operations */
+#define LPSS_I2C_TIMEOUT_US		10000
 
 /* High and low times in different speed modes (in ns) */
 enum {