[coreboot-gerrit] Patch merged into coreboot/master: mainboard/google/reef: update DMIC related pins configuration

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 50198c117839ee01c331a827dc57b6293c989f34
Author: Sathyanarayana Nujella <sathyanarayana.nujella at intel.com>
Date:   Mon Oct 31 10:48:43 2016 -0700

    mainboard/google/reef: update DMIC related pins configuration
    
    CLK_B1(GPIO_80) and DATA_2(GPIO_83) pins needs to be
    configured as native mode to use them for DMIC record
    on other potential DMIC's.
    
    DMIC blobs configure the clocks. For stereo & quad channel
    record, both CLK_A1 and CLK_B1 are enabled.
    For mono channel record, only CLK_A1 is enabled.
    
    BUG=chrome-os-partner:56918
    BRANCH=None
    TEST=During DMIC record, check CLK_B1 and DATA_2 lines
    
    Change-Id: I838009b85190de5360d593238e48c9593c1dc43a
    Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella at intel.com>
    Reviewed-on: https://review.coreboot.org/17199
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>


See https://review.coreboot.org/17199 for details.

-gerrit