[coreboot-gerrit] Patch merged into coreboot/master: riscv: Unify SBI call implementations under arch/riscv/
gerrit at coreboot.org
gerrit at coreboot.org
Mon Nov 7 16:47:57 CET 2016
the following patch was just integrated into master:
commit 99f2f113ec397dd042dcaa23c47123f3def19ebc
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date: Fri Oct 28 00:25:02 2016 +0200
riscv: Unify SBI call implementations under arch/riscv/
Note that currently, traps are only handled by the trap handler
installed in the bootblock. The romstage and ramstage don't override it.
TEST=Booted emulation/spike-qemu and lowrisc/nexys4ddr with a linux
payload. It worked as much as before (Linux didn't boot, but it
made some successful SBI calls)
Change-Id: Icce96ab3f41ae0f34bd86e30f9ff17c30317854e
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Reviewed-on: https://review.coreboot.org/17057
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
Reviewed-by: Ronald G. Minnich <rminnich at gmail.com>
See https://review.coreboot.org/17057 for details.
-gerrit
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