[coreboot-gerrit] Patch set updated for coreboot: riscv: change payload() to pass the config string pointer as arg0
Ronald G. Minnich (rminnich@gmail.com)
gerrit at coreboot.org
Mon Nov 7 01:34:48 CET 2016
Ronald G. Minnich (rminnich at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17254
-gerrit
commit 6b19021b75bc3cd48587c8805e9e5f6ed0c35299
Author: Ronald G. Minnich <rminnich at gmail.com>
Date: Sun Nov 6 16:13:52 2016 -0800
riscv: change payload() to pass the config string pointer as arg0
The riscv 1.9 standard defines a textual config string to be passed
to kernels and hypervisors. A pointer to this string is available
at a platform-dependent location, default 0x100c on all extant platforms.
Define a new config variable, ARCH_CONFIGSTRING_RISCV, to contain
this location and change payload() arguments so arg0 is this pointer
and arg1 is the pointer to the payload.
Change-Id: I3be7f1712accf2d726704e4c970f22749d3c3f36
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
---
src/arch/riscv/Kconfig | 5 +++++
src/arch/riscv/boot.c | 6 ++++--
src/arch/riscv/payload.S | 4 +++-
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig
index a30cb70..7c43da4 100644
--- a/src/arch/riscv/Kconfig
+++ b/src/arch/riscv/Kconfig
@@ -19,3 +19,8 @@ config ARCH_ROMSTAGE_RISCV
config ARCH_RAMSTAGE_RISCV
bool
default n
+
+config ARCH_CONFIGSTRING_RISCV
+ hex "Location of pointer to RISCV config string"
+ default 0x100c
+ depends on ARCH_RISCV
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index ff1844e..f9cc54f 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -22,12 +22,14 @@
void arch_prog_run(struct prog *prog)
{
void (*doit)(void *) = prog_entry(prog);
- void riscvpayload(void *);
+ void riscvpayload(void *configstring, void *payload);
+ char *configstring = *(char **)CONFIG_ARCH_CONFIGSTRING_RISCV;
if (ENV_RAMSTAGE && prog_type(prog) == PROG_PAYLOAD) {
+ printk(BIOS_SPEW, "Config string: '%s'\n", configstring);
initVirtualMemory();
printk(BIOS_SPEW, "OK, let's go\n");
- riscvpayload(doit);
+ riscvpayload(configstring, doit);
}
doit(prog_entry_arg(prog));
diff --git a/src/arch/riscv/payload.S b/src/arch/riscv/payload.S
index 3261a80..e50a589 100644
--- a/src/arch/riscv/payload.S
+++ b/src/arch/riscv/payload.S
@@ -11,10 +11,12 @@
* GNU General Public License for more details.
*/
+// "return" to a payload pointed to by a1 with
+// a pointer to the config string in a0.
.global riscvpayload
riscvpayload:
/* Jump to a0 in S-mode */
- mv t0,a0
+ mv t0,a1
csrw mepc, t0
csrr t0, mstatus
li t1, ~(3<<11)
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