[coreboot-gerrit] Patch set updated for coreboot: nb/intel/i945/early_init.c: Add DDR2-667 detection for 945GC

[HAOUAS Elyes (ehaouas@noos.fr)]

HAOUAS Elyes (ehaouas at noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17191

-gerrit

commit 13b6d7756323b39282df3da0fa44ff4da7d8a4c4
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Sun Oct 30 18:30:21 2016 +0100

    nb/intel/i945/early_init.c: Add DDR2-667 detection for 945GC
    
    945G-M4 returns : "unknown max. RAM clock (2)",
    however, it support up to DDR2-667MHz.
    i945/raminit.c sdram_capabilities_max_supported_memory_frequency()
    function returns 667 for case 2.
    
    Change-Id: I3d54c88af897a71db757d00288f3968ed2c19151
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
 src/northbridge/intel/i945/early_init.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 4373167..e91d590 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -130,6 +130,7 @@ static void i945_detect_chipset(void)
 	reg8 = (pci_read_config8(PCI_DEV(0, 0x00, 0), 0xe4) & 0x07);
 	switch (reg8) {
 	case 0:
+	case 2:
 		printk(BIOS_DEBUG, "up to DDR2-667");
 		break;
 	case 3: