[coreboot-gerrit] New patch to review for coreboot: amd/pi/hudson: Move audio to northbridge

[Marc Jones (marc@marcjonesconsulting.com)]

Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17216

-gerrit

commit 133d10b284a1082a28e65ee8035e4cca7f3a73fb
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date:   Mon Oct 31 14:17:46 2016 -0400

    amd/pi/hudson: Move audio to northbridge
    
    Carrizo (00660F01), Merlin Falcon (00660F01), and Stoney Ridge (00670F00)
    locate the HD audio controller on the northbridge root complex at 9.2
    instead of the FCH.  This duplicates the existing ASL into the northbridge
    directories and reports the correct address.
    
    Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
    Original-Reviewed-by: Marc Jones <marcj303 at gmail.com>
    (cherry picked from commit f68206c2b42c90076efd968a99f4d3a49e403438)
    
    Change-Id: I6d42bb40ad58c7f35e8c88ff27ebd327d656c021
    Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
 .../amd/pi/00660F01/acpi/northbridge.asl           | 37 ++++++++++++++++++++++
 .../amd/pi/00670F00/acpi/northbridge.asl           | 37 ++++++++++++++++++++++
 src/southbridge/amd/pi/hudson/acpi/fch.asl         |  2 ++
 3 files changed, 76 insertions(+)

diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
index 022b347..d54f985 100644
--- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
@@ -129,3 +129,40 @@ Device(PBRC) {
 		Return (PSC)			/* PIC Mode */
 	} /* end _PRT */
 } /* end PBR8 */
+
+Device(AZHD) {	/* 0:9.2 - HD Audio */
+	Name(_ADR, 0x00090002)
+	OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
+		Field(AZPD, AnyAcc, NoLock, Preserve) {
+		offset (0x42),
+		NSDI, 1,
+		NSDO, 1,
+		NSEN, 1,
+		offset (0x44),
+		IPCR, 4,
+		offset (0x54),
+		PWST, 2,
+		, 6,
+		PMEB, 1,
+		, 6,
+		PMST, 1,
+		offset (0x62),
+		MMCR, 1,
+		offset (0x64),
+		MMLA, 32,
+		offset (0x68),
+		MMHA, 32,
+		offset (0x6C),
+		MMDT, 16,
+	}
+
+	Method (_INI, 0, NotSerialized)
+	{
+		If (LEqual (OSVR, 0x03))
+		{
+			Store (Zero, NSEN)
+			Store (One, NSDO)
+			Store (One, NSDI)
+		}
+	}
+} /* end AZHD */
diff --git a/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl b/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl
index e5cf34f..c5876ff 100644
--- a/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl
@@ -95,3 +95,40 @@ Device(PBR8) {
 		Return (PS8)			/* PIC Mode */
 	} /* end _PRT */
 } /* end PBR8 */
+
+Device(AZHD) {	/* 0:9.2 - HD Audio */
+	Name(_ADR, 0x00090002)
+	OperationRegion(AZPD, PCI_Config, 0x00, 0x100)
+		Field(AZPD, AnyAcc, NoLock, Preserve) {
+		offset (0x42),
+		NSDI, 1,
+		NSDO, 1,
+		NSEN, 1,
+		offset (0x44),
+		IPCR, 4,
+		offset (0x54),
+		PWST, 2,
+		, 6,
+		PMEB, 1,
+		, 6,
+		PMST, 1,
+		offset (0x62),
+		MMCR, 1,
+		offset (0x64),
+		MMLA, 32,
+		offset (0x68),
+		MMHA, 32,
+		offset (0x6C),
+		MMDT, 16,
+	}
+
+	Method (_INI, 0, NotSerialized)
+	{
+		If (LEqual (OSVR, 0x03))
+		{
+			Store (Zero, NSEN)
+			Store (One, NSDO)
+			Store (One, NSDI)
+		}
+	}
+} /* end AZHD */
diff --git a/src/southbridge/amd/pi/hudson/acpi/fch.asl b/src/southbridge/amd/pi/hudson/acpi/fch.asl
index 0426b00..b8c0b35 100644
--- a/src/southbridge/amd/pi/hudson/acpi/fch.asl
+++ b/src/southbridge/amd/pi/hudson/acpi/fch.asl
@@ -51,7 +51,9 @@ Device(SBUS) {
 #include "usb.asl"
 
 /* 0:14.2 - HD Audio */
+#if !CONFIG_SOUTHBRIDGE_AMD_PI_KERN
 #include "audio.asl"
+#endif
 
 /* 0:14.3 - LPC */
 #include "lpc.asl"