[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Disable Monitor and Mwait feature
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com)
gerrit at coreboot.org
Tue Nov 1 20:35:52 CET 2016
Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17200
-gerrit
commit d52fa3e0ca4320df6db898dc8591d3e9dea69d07
Author: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Date: Mon Oct 31 17:03:55 2016 -0700
soc/intel/apollolake: Disable Monitor and Mwait feature
Monitor/Mwait is broken on APL. So, it needs to be disabled.
BUG=chrome-os-partner:56922
BRANCH=None
Change-Id: I12cd4280de62e0a639b43538171660ee4c0a0265
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
src/include/cpu/intel/turbo.h | 3 +++
src/soc/intel/apollolake/cpu.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/src/include/cpu/intel/turbo.h b/src/include/cpu/intel/turbo.h
index 8a93b3c..6626cb1 100644
--- a/src/include/cpu/intel/turbo.h
+++ b/src/include/cpu/intel/turbo.h
@@ -21,6 +21,9 @@
#define PM_CAP_TURBO_MODE (1 << 1)
#define MSR_IA32_MISC_ENABLES 0x1a0
+/* Disable the Monitor Mwait FSM feature */
+#define MONITOR_MWAIT_DIS_MASK 0x40000
+
#define H_MISC_DISABLE_TURBO (1 << 6)
enum {
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index bd5cff5..6b5dee2 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -29,6 +29,7 @@
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/smm.h>
+#include <cpu/intel/turbo.h>
static const struct reg_script core_msr_script[] = {
/* Enable C-state and IO/MWAIT redirect */
@@ -40,6 +41,8 @@ static const struct reg_script core_msr_script[] = {
(ACPI_PMIO_CST_REG | (PMG_IO_BASE_CST_RNG_BLK_SIZE << 16))),
/* Disable C1E */
REG_MSR_RMW(MSR_POWER_CTL, ~0x2, 0),
+ /* Disable support for MONITOR and MWAIT instructions */
+ REG_MSR_RMW(MSR_IA32_MISC_ENABLES, ~MONITOR_MWAIT_DIS_MASK, 0),
REG_SCRIPT_END
};
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