[coreboot-gerrit] New patch to review for coreboot: soc/intel/apollolake: Disable Monitor and Mwait feature

Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com) gerrit at coreboot.org
Tue Nov 1 01:24:01 CET 2016


Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17200

-gerrit

commit ae45eea0e40a6eda9646eb9703fc2c0a780bff65
Author: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
Date:   Mon Oct 31 17:03:55 2016 -0700

    soc/intel/apollolake: Disable Monitor and Mwait feature
    
    Disable Monitor/Mwait as part of SkipMpInit enablement.
    
    BUG=chrome-os-partner:56922
    BRANCH=None
    
    Change-Id: I12cd4280de62e0a639b43538171660ee4c0a0265
    Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri at intel.com>
---
 src/soc/intel/apollolake/cpu.c             | 13 +++++++++++++
 src/soc/intel/apollolake/include/soc/cpu.h |  8 ++++++++
 2 files changed, 21 insertions(+)

diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index bd5cff5..07d38f2 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -43,10 +43,23 @@ static const struct reg_script core_msr_script[] = {
 	REG_SCRIPT_END
 };
 
+static void configure_features(void)
+{
+	msr_t msr;
+
+	/* Disable support for MONITOR and MWAIT instructions */
+	msr = rdmsr(MSR_IA32_MISC_ENABLES);
+	msr.lo &= ~MONITOR_MWAIT_DIS_MASK;
+	wrmsr(MSR_IA32_MISC_ENABLES, msr);
+}
+
 static void soc_core_init(device_t cpu)
 {
 	/* Set core MSRs */
 	reg_script_run(core_msr_script);
+
+	/* Set and lock feature MSR's */
+	configure_features();
 }
 
 static struct device_operations cpu_dev_ops = {
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h
index e94972d..c2e02be 100644
--- a/src/soc/intel/apollolake/include/soc/cpu.h
+++ b/src/soc/intel/apollolake/include/soc/cpu.h
@@ -28,6 +28,14 @@ void apollolake_init_cpus(struct device *dev);
 #define CPUID_APOLLOLAKE_A0	0x506c8
 #define CPUID_APOLLOLAKE_B0	0x506c9
 
+/* Miscellaneous features for core and package */
+#ifndef MSR_IA32_MISC_ENABLES
+#define MSR_IA32_MISC_ENABLES	0x1a0
+#endif
+
+/* Disable the Monitor Mwait FSM feature */
+#define MONITOR_MWAIT_DIS_MASK	0x40000
+
 #define MSR_PLATFORM_INFO	0xce
 #define MSR_POWER_MISC		0x120
 #define MSR_CORE_THREAD_COUNT	0x35



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