[coreboot-gerrit] Patch set updated for coreboot: soc/intel/quark: Rename pmc.c to lpc.c
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Tue May 31 03:07:02 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14946
-gerrit
commit d5eea22e138d533fcba249664c6d2582966bd1cb
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun May 22 15:34:11 2016 -0700
soc/intel/quark: Rename pmc.c to lpc.c
Rename the file pmc.c to lpc.c to prepare for further additions.
TEST=Build and run on Galileo Gen2
Change-Id: If98825d72878f0601f77bff8c766276dbda8a9ae
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/soc/intel/quark/Makefile.inc | 2 +-
src/soc/intel/quark/lpc.c | 51 ++++++++++++++++++++++++++++++++++++++++
src/soc/intel/quark/pmc.c | 51 ----------------------------------------
3 files changed, 52 insertions(+), 52 deletions(-)
diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc
index a6d03b1..08325e7 100644
--- a/src/soc/intel/quark/Makefile.inc
+++ b/src/soc/intel/quark/Makefile.inc
@@ -27,9 +27,9 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += chip.c
ramstage-y += ehci.c
ramstage-y += gpio_i2c.c
+ramstage-y += lpc.c
ramstage-y += memmap.c
ramstage-y += northcluster.c
-ramstage-y += pmc.c
ramstage-y += reg_access.c
ramstage-y += tsc_freq.c
ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
diff --git a/src/soc/intel/quark/lpc.c b/src/soc/intel/quark/lpc.c
new file mode 100644
index 0000000..fbed935
--- /dev/null
+++ b/src/soc/intel/quark/lpc.c
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2014 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+#include <soc/pm.h>
+#include <soc/ramstage.h>
+
+static void pmc_read_resources(device_t dev)
+{
+ unsigned index = 0;
+ struct resource *res;
+
+ /* Get the normal PCI resources of this device. */
+ pci_dev_read_resources(dev);
+
+ /* PMBASE */
+ res = new_resource(dev, index++);
+ res->base = ACPI_BASE_ADDRESS;
+ res->size = ACPI_BASE_SIZE;
+ res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+}
+
+static struct device_operations device_ops = {
+ .read_resources = &pmc_read_resources,
+ .set_resources = &pci_dev_set_resources,
+ .enable_resources = &pci_dev_enable_resources,
+ .scan_bus = &scan_lpc_bus,
+};
+
+static const struct pci_driver pmc __pci_driver = {
+ .ops = &device_ops,
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = QUARK_V_LPC_DEVICE_ID_0,
+};
diff --git a/src/soc/intel/quark/pmc.c b/src/soc/intel/quark/pmc.c
deleted file mode 100644
index fbed935..0000000
--- a/src/soc/intel/quark/pmc.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015-2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <soc/iomap.h>
-#include <soc/pci_devs.h>
-#include <soc/pm.h>
-#include <soc/ramstage.h>
-
-static void pmc_read_resources(device_t dev)
-{
- unsigned index = 0;
- struct resource *res;
-
- /* Get the normal PCI resources of this device. */
- pci_dev_read_resources(dev);
-
- /* PMBASE */
- res = new_resource(dev, index++);
- res->base = ACPI_BASE_ADDRESS;
- res->size = ACPI_BASE_SIZE;
- res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
-}
-
-static struct device_operations device_ops = {
- .read_resources = &pmc_read_resources,
- .set_resources = &pci_dev_set_resources,
- .enable_resources = &pci_dev_enable_resources,
- .scan_bus = &scan_lpc_bus,
-};
-
-static const struct pci_driver pmc __pci_driver = {
- .ops = &device_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .device = QUARK_V_LPC_DEVICE_ID_0,
-};
More information about the coreboot-gerrit
mailing list