[coreboot-gerrit] Patch set updated for coreboot: mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header

[Timothy Pearson (tpearson@raptorengineering.com)]

Timothy Pearson (tpearson at raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14892

-gerrit

commit 8249d8120da668a962fb6542a8c58d566c7fd09e
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Wed May 18 13:33:13 2016 -0500

    mainboard/asus/[kgpe-d16|kcma-d8]: Enable secondary serial port header
    
    The ASUS KGPE-D16/KCMA-D8 have an on-board header for a second RS-232
    serial port, however it is disabled by default due to the SuperIO
    default pin mux settings.  Enable the secondary serial port early
    in romstage to allow use during / after initial boot.
    
    Change-Id: I5b83659dd8b0d6af559c9ceccee55c4cc2f17165
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/mainboard/asus/kcma-d8/dsdt.asl    | 24 ++++++++++++++++++++++++
 src/mainboard/asus/kcma-d8/romstage.c  |  8 ++++++--
 src/mainboard/asus/kgpe-d16/dsdt.asl   | 24 ++++++++++++++++++++++++
 src/mainboard/asus/kgpe-d16/romstage.c |  8 ++++++--
 4 files changed, 60 insertions(+), 4 deletions(-)

diff --git a/src/mainboard/asus/kcma-d8/dsdt.asl b/src/mainboard/asus/kcma-d8/dsdt.asl
index ef87d31..d305af5 100644
--- a/src/mainboard/asus/kcma-d8/dsdt.asl
+++ b/src/mainboard/asus/kcma-d8/dsdt.asl
@@ -587,6 +587,30 @@ DefinitionBlock (
 						})
 					}
 				}
+
+				/* UART 2 */
+				Device (URT2)
+				{
+					Name (_HID, EisaId ("PNP0501"))		// "PNP0501" for UART
+					Name(_PRW, Package () {0x03, 0x04})	// Wake from S1-S4
+					Method (_STA, 0, NotSerialized)
+					{
+						Return (0x0f)			// Always enable
+					}
+					Name (_PRS, ResourceTemplate() {
+						StartDependentFn(0, 1) {
+							IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8)
+							IRQNoFlags() { 3 }
+						} EndDependentFn()
+					})
+					Method (_CRS, 0)
+					{
+						Return(ResourceTemplate() {
+							IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8)
+							IRQNoFlags() { 3 }
+						})
+					}
+				}
 			}
 
 			/* High Precision Event Timer */
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index 9d1d95f..cf0ab39 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -46,7 +46,8 @@
 #include "northbridge/amd/amdfam10/debug.c"
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
 
-#define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
+#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
+#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
 
 static void activate_spd_rom(const struct mem_controller *ctrl);
 
@@ -400,8 +401,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		/* Initialize southbridge */
 		sb7xx_51xx_pci_port80();
 
+		/* Configure secondary serial port pin mux */
+		winbond_set_pinmux(SERIAL_1_DEV, 0x2a, W83667HG_SPI_PINMUX_GPIO4_SERIAL_B_MASK, W83667HG_SPI_PINMUX_SERIAL_B);
+
 		/* Initialize early serial */
-		winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+		winbond_enable_serial(SERIAL_0_DEV, CONFIG_TTYS0_BASE);
 		console_init();
 
 		/* Disable LPC legacy DMA support to prevent lockup */
diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl
index 5f9195a..d364f1f 100644
--- a/src/mainboard/asus/kgpe-d16/dsdt.asl
+++ b/src/mainboard/asus/kgpe-d16/dsdt.asl
@@ -587,6 +587,30 @@ DefinitionBlock (
 						})
 					}
 				}
+
+				/* UART 2 */
+				Device (URT2)
+				{
+					Name (_HID, EisaId ("PNP0501"))		// "PNP0501" for UART
+					Name(_PRW, Package () {0x03, 0x04})	// Wake from S1-S4
+					Method (_STA, 0, NotSerialized)
+					{
+						Return (0x0f)			// Always enable
+					}
+					Name (_PRS, ResourceTemplate() {
+						StartDependentFn(0, 1) {
+							IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8)
+							IRQNoFlags() { 3 }
+						} EndDependentFn()
+					})
+					Method (_CRS, 0)
+					{
+						Return(ResourceTemplate() {
+							IO(Decode16, 0x2f8, 0x2f8, 0x8, 0x8)
+							IRQNoFlags() { 3 }
+						})
+					}
+				}
 			}
 
 			/* High Precision Event Timer */
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 5a7400e..8825b23 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -46,7 +46,8 @@
 #include "northbridge/amd/amdfam10/debug.c"
 #include "northbridge/amd/amdfam10/setup_resource_map.c"
 
-#define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
+#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
+#define SERIAL_1_DEV PNP_DEV(0x2e, W83667HG_A_SP2)
 
 static void activate_spd_rom(const struct mem_controller *ctrl);
 
@@ -441,8 +442,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		/* Initialize southbridge */
 		sb7xx_51xx_pci_port80();
 
+		/* Configure secondary serial port pin mux */
+		winbond_set_pinmux(SERIAL_1_DEV, 0x2a, W83667HG_SPI_PINMUX_GPIO4_SERIAL_B_MASK, W83667HG_SPI_PINMUX_SERIAL_B);
+
 		/* Initialize early serial */
-		winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+		winbond_enable_serial(SERIAL_0_DEV, CONFIG_TTYS0_BASE);
 		console_init();
 
 		/* Disable LPC legacy DMA support to prevent lockup */