[coreboot-gerrit] Patch set updated for coreboot: google/reef: Sync chromeos.fmd with fmap.dts and fix offsets

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14975

-gerrit

commit 335af145614dbcc0bbff0865883e781577c8506a
Author: Furquan Shaikh <furquan at google.com>
Date:   Wed May 25 17:04:55 2016 -0700

    google/reef: Sync chromeos.fmd with fmap.dts and fix offsets
    
    CQ-DEPEND=CL:347460
    BUG=chrome-os-partner:53689
    BRANCH=None
    TEST="emerge-reef chromeos-bootimage" completes without error
    
    Change-Id: Ic954e29628423937604772a8d2d0414954e6ba3e
    Signed-off-by: Furquan Shaikh <furquan at google.com>
    Reviewed-on: https://chromium-review.googlesource.com/347441
    Commit-Ready: Furquan Shaikh <furquan at chromium.org>
    Tested-by: Furquan Shaikh <furquan at chromium.org>
    Reviewed-by: Furquan Shaikh <furquan at chromium.org>
---
 src/mainboard/google/reef/chromeos.fmd | 57 +++++++++++++++++-----------------
 1 file changed, 28 insertions(+), 29 deletions(-)

diff --git a/src/mainboard/google/reef/chromeos.fmd b/src/mainboard/google/reef/chromeos.fmd
index 5e8b559..a3fb8b5 100644
--- a/src/mainboard/google/reef/chromeos.fmd
+++ b/src/mainboard/google/reef/chromeos.fmd
@@ -1,40 +1,39 @@
 FLASH 8M {
-	WP_RO 4M {
-		SI_ALL 2M {
-			SI_DESC 4K
-			bootblock at 509056 32K
+	WP_RO at 0x0 0x400000 {
+		SI_ALL at 0x0 0x200000 {
+			SI_DESC at 0x0 0x1000
+			bootblock at 0x7c480 0x8000
 		}
-		RO_SECTION at 2M 2M {
-			RO_VPD 0x4000
-			FMAP 0x800
-			RO_FRID 0x40
-			RO_FRID_PAD 0x7c0
-			COREBOOT(CBFS)
+		RO_SECTION at 0x200000 0x200000 {
+			RO_VPD at 0x0 0x4000
+			FMAP at 0x4000 0x800
+			RO_FRID at 0x4800 0x40
+			RO_FRID_PAD at 0x4840 0x7c0
+			COREBOOT(CBFS)@0x5000 0x17b000
 			# logical boot partition 2. Remove with updated CSE
-			SIGN_CSE at 0x180000 64K
-			# GBB grows to fill the remaining region...
-			GBB
+			SIGN_CSE at 0x180000 0x10000
+			GBB at 0x190000 0x70000
 		}
 	}
-	MISC_RW  {
-		RW_MRC_CACHE 64K
-		RW_ELOG 16K
-		RW_SHARED 16K {
-			SHARED_DATA 8K
-			VBLOCK_DEV 8K
+	MISC_RW at 0x400000 0x1a000 {
+		RW_MRC_CACHE at 0x0 0x10000
+		RW_ELOG at 0x10000 0x4000
+		RW_SHARED at 0x14000 0x4000 {
+			SHARED_DATA at 0x0 0x2000
+			VBLOCK_DEV at 0x2000 0x2000
 		}
-		RW_VPD 8K
+		RW_VPD at 0x18000 0x2000
 	}
-	RW_SECTION_A 0xf0000 {
-		VBLOCK_A 64K
-		FW_MAIN_A(CBFS) 768K
-		RW_FWID_A 64
+	RW_SECTION_A at 0x41a000 0x173000 {
+		VBLOCK_A at 0x0 0x10000
+		FW_MAIN_A(CBFS)@0x10000 0x162fc0
+		RW_FWID_A at 0x172fc0 0x40
 	}
-	RW_SECTION_B 0xf0000 {
-		VBLOCK_B 64K
-		FW_MAIN_B(CBFS) 768K
-		RW_FWID_B 64
+	RW_SECTION_B at 0x58d000 0x173000 {
+		VBLOCK_B at 0x0 0x10000
+		FW_MAIN_B(CBFS)@0x10000 0x162fc0
+		RW_FWID_B at 0x172fc0 0x40
 	}
-	DEVICE_EXTENSION at 7M 1M
+	DEVICE_EXTENSION at 0x700000 0x100000
 }