[coreboot-gerrit] New patch to review for coreboot: console/post: be explicit about conditional cmos_post_log() compiling

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14958

-gerrit

commit 4396882d5ff587c4b981ac3306d45a718e735a60
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue May 24 14:47:10 2016 -0500

    console/post: be explicit about conditional cmos_post_log() compiling
    
    The current code was using !__PRE_RAM__ as a proxy for ramstage
    conditional compilation. In the face of postcar stage not defining
    __PRE_RAM__ (because it's after RAM is up) these code paths
    can fail to compile with a __SIMPLE_DEVICE__ defined for the entire
    stage. Remedy the current situation by just compiling explicity for
    ramstage because that was the original intent. In the future,
    the __SIMPLE_DEVICE__ selection for postcar can also be re-evaluated.
    
    Change-Id: I0f887f1e45f0cf5c235ae5144eaa227921e7119b
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/console/post.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/console/post.c b/src/console/post.c
index b43bd09..481a1f4 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -20,6 +20,7 @@
 #include <device/device.h>
 #include <pc80/mc146818rtc.h>
 #include <smp/spinlock.h>
+#include <rules.h>
 
 /* Write POST information */
 
@@ -41,7 +42,7 @@ void __attribute__((weak)) mainboard_post(uint8_t value)
 
 DECLARE_SPIN_LOCK(cmos_post_lock)
 
-#if !defined(__PRE_RAM__)
+#if ENV_RAMSTAGE
 void cmos_post_log(void)
 {
 	u8 code = 0;
@@ -122,7 +123,7 @@ void post_log_clear(void)
 	post_log_extra(0);
 }
 #endif /* CONFIG_CMOS_POST_EXTRA */
-#endif /* !__PRE_RAM__ */
+#endif /* ENV_RAMSTAGE */
 
 static void cmos_post_code(u8 value)
 {