[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp2_0: Send post codes around calls to the blobs

[Alexandru Gagniuc (alexandrux.gagniuc@intel.com)]

Alexandru Gagniuc (alexandrux.gagniuc at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14951

-gerrit

commit c77c0038003dcc551670807c0c7b0c7ed7235bb2
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Mon May 23 12:16:58 2016 -0700

    drivers/intel/fsp2_0: Send post codes around calls to the blobs
    
    By design, FSP will send POST codes to port 80. In this case we have
    both coreboot and FSP pushing post codes, which may make debugging
    harder. In order to get a clear picture of where FSP execution begins
    and ends, send post codes before and after any call to the FSP blobs.
    
    Note that sending a post code both before and after is mostly useful
    on chromeec enabled boards, where the EC console will provide a
    historic list of post codes.
    
    Change-Id: Icfd22b4f6d9e91b01138f97efd711d9204028eb1
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/drivers/intel/fsp2_0/memory_init.c  |  3 ++-
 src/drivers/intel/fsp2_0/notify.c       | 14 ++++++++++----
 src/drivers/intel/fsp2_0/silicon_init.c |  2 ++
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index c1c2fe4..45516aa 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -51,9 +51,10 @@ static enum fsp_status do_fsp_memory_init(void **hob_list_ptr,
 	printk(BIOS_SPEW, "\t%p: raminit_upd\n", &fspm_upd);
 	printk(BIOS_SPEW, "\t%p: hob_list ptr\n", hob_list_ptr);
 
+	post_code(POST_FSP_MEMORY_INIT);
 	timestamp_add_now(TS_FSP_MEMORY_INIT_START);
 	status = fsp_raminit(&fspm_upd, hob_list_ptr);
-	post_code(0x37);
+	post_code(POST_FSP_MEMORY_INIT);
 	timestamp_add_now(TS_FSP_MEMORY_INIT_END);
 
 	printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c
index d9de022..bd489d4 100644
--- a/src/drivers/intel/fsp2_0/notify.c
+++ b/src/drivers/intel/fsp2_0/notify.c
@@ -38,17 +38,23 @@ enum fsp_status fsp_notify(enum fsp_notify_phase phase)
 
 	printk(BIOS_DEBUG, "FspNotify %x\n", (uint32_t) phase);
 
-	if (phase == AFTER_PCI_ENUM)
+	if (phase == AFTER_PCI_ENUM) {
 		timestamp_add_now(TS_FSP_BEFORE_ENUMERATE);
-	else if (phase == READY_TO_BOOT)
+		post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
+	} else if (phase == READY_TO_BOOT) {
 		timestamp_add_now(TS_FSP_BEFORE_FINALIZE);
+		post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
+	}
 
 	ret = fspnotify(&notify_params);
 
-	if (phase == AFTER_PCI_ENUM)
+	if (phase == AFTER_PCI_ENUM) {
 		timestamp_add_now(TS_FSP_AFTER_ENUMERATE);
-	else if (phase == READY_TO_BOOT)
+		post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
+	} else if (phase == READY_TO_BOOT) {
 		timestamp_add_now(TS_FSP_AFTER_FINALIZE);
+		post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
+	}
 
 	return ret;
 }
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 18aded5..f1deed7 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -42,10 +42,12 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr)
 	platform_fsp_silicon_init_params_cb(&upd);
 
 	timestamp_add_now(TS_FSP_SILICON_INIT_START);
+	post_code(POST_FSP_SILICON_INIT);
 	silicon_init = (void *) (hdr->image_base +
 				 hdr->silicon_init_entry_offset);
 	status = silicon_init(&upd);
 	timestamp_add_now(TS_FSP_SILICON_INIT_END);
+	post_code(POST_FSP_SILICON_INIT);
 
 	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
 	return status;