[coreboot-gerrit] New patch to review for coreboot: AGESA: Fix invalid use of CFG_ declarations

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Wed May 18 15:46:36 CEST 2016


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14887

-gerrit

commit e0968895231dfd0b6f3bad7accab38cd29d303d9
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed May 18 13:35:21 2016 +0300

    AGESA: Fix invalid use of CFG_ declarations
    
    The declarations of CFG_ evaluate to correct values only when
    included after the definitions of BLDCFG_ in buildOpts.c.
    So we never have CFG_PLAT_NUM_IO_APICS defined here.
    
    Change-Id: I94b3dee5a3207b37921eb24a0bcd73b5a217b2d3
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/amd/agesa/family10/northbridge.c   |  1 -
 src/northbridge/amd/agesa/family15/northbridge.c   | 11 +++++------
 src/northbridge/amd/agesa/family15rl/northbridge.c | 11 +++++------
 src/northbridge/amd/agesa/family15tn/northbridge.c | 11 +++++------
 src/northbridge/amd/agesa/family16kb/northbridge.c | 11 +++++------
 5 files changed, 20 insertions(+), 25 deletions(-)

diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 4c98ac3..1d3babf 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -34,7 +34,6 @@
 #include <cpu/amd/amdfam10_sysconf.h>
 #include <Porting.h>
 #include <AGESA.h>
-#include <Options.h>
 #include "amdfam10.h"
 
 extern uint32_t agesawrapper_amdinitmid(void);
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index c283103..be704a5 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -33,7 +33,6 @@
 
 #include <Porting.h>
 #include <AGESA.h>
-#include <Options.h>
 #include <Topology.h>
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
@@ -1081,11 +1080,11 @@ static void cpu_bus_scan(device_t dev)
 			 * This is needed because many IO-APIC devices only have 4 bits
 			 * for their APIC id and therefore must reside at 0..15
                          */
-#ifndef CFG_PLAT_NUM_IO_APICS /* defined in mainboard buildOpts.c */
-#define CFG_PLAT_NUM_IO_APICS 3
-#endif
-			if ((node_nums * core_max) + CFG_PLAT_NUM_IO_APICS >= 0x10) {
-				lapicid_start = (CFG_PLAT_NUM_IO_APICS - 1) / core_max;
+
+                        u8 plat_num_io_apics = 3; /* FIXME */
+
+			if ((node_nums * core_max) + plat_num_io_apics >= 0x10) {
+				lapicid_start = (plat_num_io_apics - 1) / core_max;
 				lapicid_start = (lapicid_start + 1) * core_max;
 				printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
 			}
diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c
index 37bca38..c4e0718 100644
--- a/src/northbridge/amd/agesa/family15rl/northbridge.c
+++ b/src/northbridge/amd/agesa/family15rl/northbridge.c
@@ -34,7 +34,6 @@
 #include <cpu/amd/mtrr.h>
 
 #include <Porting.h>
-#include <Options.h>
 #include <Topology.h>
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
@@ -1071,11 +1070,11 @@ static void cpu_bus_scan(device_t dev)
 			 * This is needed because many IO-APIC devices only have 4 bits
 			 * for their APIC id and therefore must reside at 0..15
                          */
-#ifndef CFG_PLAT_NUM_IO_APICS /* defined in mainboard buildOpts.c */
-#define CFG_PLAT_NUM_IO_APICS 3
-#endif
-			if ((node_nums * core_max) + CFG_PLAT_NUM_IO_APICS >= 0x10) {
-				lapicid_start = (CFG_PLAT_NUM_IO_APICS - 1) / core_max;
+
+                        u8 plat_num_io_apics = 3; /* FIXME */
+
+			if ((node_nums * core_max) + plat_num_io_apics >= 0x10) {
+				lapicid_start = (plat_num_io_apics - 1) / core_max;
 				lapicid_start = (lapicid_start + 1) * core_max;
 				printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
 			}
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 50afe73..d64dc80 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -33,7 +33,6 @@
 #include <cpu/amd/mtrr.h>
 
 #include <Porting.h>
-#include <Options.h>
 #include <Topology.h>
 #include <cpu/amd/amdfam15.h>
 #include <cpuRegisters.h>
@@ -1070,11 +1069,11 @@ static void cpu_bus_scan(device_t dev)
 			 * This is needed because many IO-APIC devices only have 4 bits
 			 * for their APIC id and therefore must reside at 0..15
                          */
-#ifndef CFG_PLAT_NUM_IO_APICS /* defined in mainboard buildOpts.c */
-#define CFG_PLAT_NUM_IO_APICS 3
-#endif
-			if ((node_nums * core_max) + CFG_PLAT_NUM_IO_APICS >= 0x10) {
-				lapicid_start = (CFG_PLAT_NUM_IO_APICS - 1) / core_max;
+
+                        u8 plat_num_io_apics = 3; /* FIXME */
+
+			if ((node_nums * core_max) + plat_num_io_apics >= 0x10) {
+				lapicid_start = (plat_num_io_apics - 1) / core_max;
 				lapicid_start = (lapicid_start + 1) * core_max;
 				printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
 			}
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 15d8125..6e32f67 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -33,7 +33,6 @@
 
 #include <Porting.h>
 #include <AGESA.h>
-#include <Options.h>
 #include <Topology.h>
 #include <cpu/amd/amdfam16.h>
 #include <cpuRegisters.h>
@@ -1087,11 +1086,11 @@ static void cpu_bus_scan(device_t dev)
 			 * This is needed because many IO-APIC devices only have 4 bits
 			 * for their APIC id and therefore must reside at 0..15
                          */
-#ifndef CFG_PLAT_NUM_IO_APICS /* defined in mainboard buildOpts.c */
-#define CFG_PLAT_NUM_IO_APICS 3
-#endif
-			if ((node_nums * core_max) + CFG_PLAT_NUM_IO_APICS >= 0x10) {
-				lapicid_start = (CFG_PLAT_NUM_IO_APICS - 1) / core_max;
+
+                        u8 plat_num_io_apics = 3; /* FIXME */
+
+			if ((node_nums * core_max) + plat_num_io_apics >= 0x10) {
+				lapicid_start = (plat_num_io_apics - 1) / core_max;
 				lapicid_start = (lapicid_start + 1) * core_max;
 				printk(BIOS_SPEW, "lpaicid_start=0x%x ", lapicid_start);
 			}



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