[coreboot-gerrit] New patch to review for coreboot: soc/apollolake: Pass earliest timestamp to timestamp_init
Alexandru Gagniuc (alexandrux.gagniuc@intel.com)
gerrit at coreboot.org
Tue May 17 01:58:53 CEST 2016
Alexandru Gagniuc (alexandrux.gagniuc at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14863
-gerrit
commit 2d5679c022d66f09d1032b2ebc6e98a47fae3490
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date: Mon May 16 16:27:45 2016 -0700
soc/apollolake: Pass earliest timestamp to timestamp_init
We have a timestamp from before cache-as-ram setup saved in the MMX
registers. Recover that timestamp, and use it as the base timestamp
rather than letting lib/bootblock.c use a late timestamp.
This allows more accurate profiling of the boot flow, since CAR setup
time is no longer excluded from the timing information.
Change-Id: I055092c600438c5260ab67509434a38f1eb77fe4
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
src/soc/intel/apollolake/bootblock/bootblock.c | 12 +++++++++++-
src/soc/intel/apollolake/bootblock/cache_as_ram.S | 6 ++++++
src/soc/intel/apollolake/include/soc/bootblock.h | 2 +-
3 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 833f531..fe32b7b 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -25,6 +25,7 @@
#include <soc/northbridge.h>
#include <soc/pci_devs.h>
#include <soc/uart.h>
+#include <timestamp.h>
static const struct pad_config tpm_spi_configs[] = {
PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* FST_SPI_CS2_N */
@@ -36,7 +37,7 @@ static void tpm_enable(void)
gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs));
}
-void asmlinkage bootblock_c_entry(void)
+void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo)
{
device_t dev = NB_DEV_ROOT;
@@ -49,6 +50,15 @@ void asmlinkage bootblock_c_entry(void)
pci_write_config32(dev, PCI_BASE_ADDRESS_1, 0);
pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
+ /* ACPI timer WA */
+ msr_t msr1;
+ msr1.hi = 0x2FBA2E25;
+ msr1.lo = (1<<16) | (ACPI_PMIO_BASE + R_ACPI_PM1_TMR);
+ wrmsr(0x121, msr1);
+
+ /* Initialize timestamps with the earliest timestamp available. */
+ timestamp_init(((uint64_t)tsc_hi << 32) | tsc_lo);
+
/* Call lib/bootblock.c main */
main();
}
diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
index cd301ac..f19cb71 100644
--- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S
+++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
@@ -129,6 +129,12 @@ car_init_done:
before_carstage:
post_code(0x2b)
+ /* Restore the timestamp from bootblock_crt0.S (mm2:mm1) */
+ movd %mm1, %eax
+ push %eax
+ movd %mm2, %eax
+ push %eax
+
/* We can call into C functions now */
call bootblock_c_entry
diff --git a/src/soc/intel/apollolake/include/soc/bootblock.h b/src/soc/intel/apollolake/include/soc/bootblock.h
index 2312487..9ce9231 100644
--- a/src/soc/intel/apollolake/include/soc/bootblock.h
+++ b/src/soc/intel/apollolake/include/soc/bootblock.h
@@ -16,5 +16,5 @@
#define _SOC_APOLLOLAKE_BOOTBLOCK_H_
#include <arch/cpu.h>
-void asmlinkage bootblock_c_entry(void);
+void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo);
#endif
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