[coreboot-gerrit] New patch to review for coreboot: mainboard/intel/galileo: Add I2C chip initialization
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Mon May 16 17:12:54 CEST 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14829
-gerrit
commit 54c138363bac4edf8e904b66f701697caf6182f7
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun May 15 15:05:56 2016 -0700
mainboard/intel/galileo: Add I2C chip initialization
Add I2C chip initialization for the Galileo boards.
TEST=Build and run on Galileo Gen2
Change-Id: Ib5284d5cd7a67de2f3f98940837ceb2aa69af468
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/mainboard/intel/galileo/Makefile.inc | 3 +
src/mainboard/intel/galileo/gen1.h | 59 ++++++++++++++++++-
src/mainboard/intel/galileo/gen2.h | 29 +++++++++-
src/mainboard/intel/galileo/gpio.c | 9 +++
src/mainboard/intel/galileo/reg_access.c | 93 ++++++++++++++++++++++++++++++
src/mainboard/intel/galileo/reg_access.h | 97 ++++++++++++++++++++++++++++++++
6 files changed, 288 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/intel/galileo/Makefile.inc b/src/mainboard/intel/galileo/Makefile.inc
index 382f8b9..4db9e31 100644
--- a/src/mainboard/intel/galileo/Makefile.inc
+++ b/src/mainboard/intel/galileo/Makefile.inc
@@ -16,3 +16,6 @@
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark
romstage-y += gpio.c
+
+ramstage-y += gpio.c
+ramstage-y += reg_access.c
diff --git a/src/mainboard/intel/galileo/gen1.h b/src/mainboard/intel/galileo/gen1.h
index 422d779..9ddec8f 100644
--- a/src/mainboard/intel/galileo/gen1.h
+++ b/src/mainboard/intel/galileo/gen1.h
@@ -15,7 +15,10 @@
#if !IS_ENABLED(CONFIG_GALILEO_GEN2)
-#include <soc/reg_access.h>
+#include "reg_access.h"
+
+/* Jumper J2 determines the slave address of Cypress I/O GPIO expander */
+#define GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO 5
static const struct reg_script gpio_init[] = {
/* Initialize the legacy GPIO controller */
@@ -53,7 +56,61 @@ static const struct reg_script gpio_init[] = {
/* Toggle the Cypress reset line */
REG_GPIO_OR(GPIO_SWPORTA_DR, BIT4),
REG_GPIO_AND(GPIO_SWPORTA_DR, ~BIT4),
+
+ REG_SCRIPT_END
+};
+
+static const struct reg_script i2c_0x20_init[] = {
+ /* Route I2C pins to Arduino header:
+ * Clear I2C_MUX (GPORT1_BIT5) to route I2C to Arduino Shield connector
+ *
+ * I2C_SDA -> ANALOG_A4
+ * I2C_SCL -> ANALOG_A5
+ */
+ REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 1),
+ REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
+ REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_OUTPUT1, ~BIT5),
+
+ /* Set all GPIO expander pins connected to the Reset Button as inputs
+ * Configure RESET_N_SHLD (GPORT5_BIT0) and SW_RESET_N_SHLD
+ * (GPORT5_BIT1) as inputs
+ */
+ REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_SELECT, 5),
+ REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x20, GEN1_GPIO_EXP_PORT_DIR, BIT1 | BIT0),
+
REG_SCRIPT_END
};
+static const struct reg_script i2c_0x21_init[] = {
+ /* Route I2C pins to Arduino header:
+ * Clear I2C_MUX (GPORT1_BIT5) to route I2C to Arduino Shield connector
+ *
+ * I2C_SDA -> ANALOG_A4
+ * I2C_SCL -> ANALOG_A5
+ */
+ REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 1),
+ REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, ~BIT5),
+ REG_I2C_AND(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_OUTPUT1, ~BIT5),
+
+ /* Set all GPIO expander pins connected to the Reset Button as inputs
+ * Configure RESET_N_SHLD (GPORT5_BIT0) and SW_RESET_N_SHLD
+ * (GPORT5_BIT1) as inputs
+ */
+ REG_I2C_WRITE(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_SELECT, 5),
+ REG_I2C_OR(GEN1_I2C_GPIO_EXP_0x21, GEN1_GPIO_EXP_PORT_DIR, BIT1 | BIT0),
+
+ REG_SCRIPT_END
+};
+
+static const struct reg_script *get_i2c_init_script(void)
+{
+ const struct reg_script *script;
+
+ /* Determine which I2C address is in use */
+ script = (reg_legacy_gpio_read (R_QNC_GPIO_RGLVL_RESUME_WELL)
+ & GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO)
+ ? &i2c_0x20_init[0] : &i2c_0x21_init[0];
+ return script;
+}
+
#endif /* CONFIG_GALILEO_GEN2 */
diff --git a/src/mainboard/intel/galileo/gen2.h b/src/mainboard/intel/galileo/gen2.h
index 013881d..dcc057a 100644
--- a/src/mainboard/intel/galileo/gen2.h
+++ b/src/mainboard/intel/galileo/gen2.h
@@ -15,7 +15,7 @@
#if IS_ENABLED(CONFIG_GALILEO_GEN2)
-#include <soc/reg_access.h>
+#include "reg_access.h"
static const struct reg_script gpio_init[] = {
/* Initialize the legacy GPIO controller */
@@ -53,4 +53,31 @@ static const struct reg_script gpio_init[] = {
REG_SCRIPT_END
};
+static const struct reg_script i2c_init[] = {
+ /* Route I2C to Arduino Shield connector:
+ * Set AMUX1_IN (EXP2.P1_4) low
+ * Configure AMUX1_IN (EXP2.P1_4) as an output
+ *
+ * I2C_SDA -> ANALOG_A4
+ * I2C_SCL -> ANALOG_A5
+ */
+ REG_I2C_AND(GEN2_I2C_GPIO_EXP2, GEN2_GPIO_EXP_OUTPUT1, ~BIT4),
+ REG_I2C_AND(GEN2_I2C_GPIO_EXP2, GEN2_GPIO_EXP_CONFIG1, ~BIT4),
+
+ /* Set all GPIO expander pins connected to the Reset Button as inputs
+ * Configure Reset Button(EXP1.P1_7) as an input
+ * Disable pullup on Reset Button(EXP1.P1_7)
+ * Configure Reset Button(EXP2.P1_7) as an input
+ * Disable pullup on Reset Button(EXP2.P1_7)
+ */
+ REG_I2C_OR(GEN2_I2C_GPIO_EXP1, GEN2_GPIO_EXP_CONFIG1, BIT7),
+ REG_I2C_AND(GEN2_I2C_GPIO_EXP1, GEN2_GPIO_EXP_PULL_UP_DOWN_EN1, ~BIT7),
+ REG_I2C_OR(GEN2_I2C_GPIO_EXP2, GEN2_GPIO_EXP_CONFIG1, BIT7),
+ REG_I2C_AND(GEN2_I2C_GPIO_EXP2, GEN2_GPIO_EXP_PULL_UP_DOWN_EN1, ~BIT7),
+
+ REG_SCRIPT_END
+};
+
+#define get_i2c_init_script() i2c_init
+
#endif /* CONFIG_GALILEO_GEN2 */
diff --git a/src/mainboard/intel/galileo/gpio.c b/src/mainboard/intel/galileo/gpio.c
index 8938830..6d51d44 100644
--- a/src/mainboard/intel/galileo/gpio.c
+++ b/src/mainboard/intel/galileo/gpio.c
@@ -21,6 +21,15 @@
#include "gen2.h"
#include <soc/ramstage.h>
+void mainboard_gpio_i2c_init(device_t dev)
+{
+ const struct reg_script *script;
+
+ printk(BIOS_INFO, "Galileo I2C chip initialization\n");
+ script = get_i2c_init_script();
+ reg_script_run(script);
+}
+
void mainboard_gpio_init(void)
{
reg_script_run(gpio_init);
diff --git a/src/mainboard/intel/galileo/reg_access.c b/src/mainboard/intel/galileo/reg_access.c
new file mode 100644
index 0000000..f19f526
--- /dev/null
+++ b/src/mainboard/intel/galileo/reg_access.c
@@ -0,0 +1,93 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define __SIMPLE_DEVICE__
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/i2c.h>
+#include <soc/pci_devs.h>
+#include <soc/reg_access.h>
+#include "reg_access.h"
+
+#if ENV_RAMSTAGE
+static uint64_t reg_read(struct reg_script_context *ctx)
+{
+ int ret_code;
+ const struct reg_script *step;
+ uint8_t value = 0;
+
+ step = ctx->step;
+ switch (step->id) {
+ default:
+ printk(BIOS_ERR,
+ "ERROR - Unknown register set (0x%08x)!\n",
+ step->id);
+ ctx->display_features = REG_SCRIPT_DISPLAY_NOTHING;
+ break;
+
+ case GEN1_I2C_GPIO_EXP_0x20:
+ case GEN1_I2C_GPIO_EXP_0x21:
+ case GEN2_I2C_GPIO_EXP0:
+ case GEN2_I2C_GPIO_EXP1:
+ case GEN2_I2C_GPIO_EXP2:
+ case GEN2_I2C_LED_PWM:
+ if (ctx->display_features)
+ printk(BIOS_INFO, "I2C chip 0x%02x: ", step->id);
+ ret_code = i2c_readb(0, step->id, (UINT8)step->reg, &value);
+ ASSERT(ret_code == 2);
+ break;
+ }
+ return value;
+}
+
+static void reg_write(struct reg_script_context *ctx)
+{
+ int ret_code;
+ const struct reg_script *step;
+ uint8_t value;
+
+ step = ctx->step;
+ switch (step->id) {
+ default:
+ printk(BIOS_ERR,
+ "ERROR - Unknown register set (0x%08x)!\n",
+ step->id);
+ ctx->display_features = REG_SCRIPT_DISPLAY_NOTHING;
+ break;
+
+ case GEN1_I2C_GPIO_EXP_0x20:
+ case GEN1_I2C_GPIO_EXP_0x21:
+ case GEN2_I2C_GPIO_EXP0:
+ case GEN2_I2C_GPIO_EXP1:
+ case GEN2_I2C_GPIO_EXP2:
+ case GEN2_I2C_LED_PWM:
+ case RMU_TEMP_REGS:
+ if (ctx->display_features)
+ printk(BIOS_INFO, "I2C chip 0x%02x: ", step->id);
+ value = (UINT8)step->value;
+ ret_code = i2c_writeb(0, step->id, (UINT8)step->reg, value);
+ ASSERT(ret_code == 2);
+ break;
+ }
+}
+
+const struct reg_script_bus_entry mainboard_reg_script_bus_table = {
+ MAINBOARD_TYPE, reg_read, reg_write
+};
+
+REG_SCRIPT_BUS_ENTRY(mainboard_reg_script_bus_table);
+
+#endif /* ENV_RAMSTAGE */
diff --git a/src/mainboard/intel/galileo/reg_access.h b/src/mainboard/intel/galileo/reg_access.h
new file mode 100644
index 0000000..451dc87
--- /dev/null
+++ b/src/mainboard/intel/galileo/reg_access.h
@@ -0,0 +1,97 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _GALILEO_REG_ACCESS_H_
+#define _GALILEO_REG_ACCESS_H_
+
+#include <fsp/util.h>
+#include <reg_script.h>
+#include <soc/IntelQNCConfig.h>
+#include <soc/QuarkNcSocId.h>
+#include <soc/reg_access.h>
+
+enum {
+ MAINBOARD_TYPE = REG_SCRIPT_TYPE_MAINBOARD_BASE,
+ /* Add additional mainboard access types here*/
+};
+
+enum {
+ GEN1_I2C_GPIO_EXP_0x20 = 0x20, /* Cypress CY8C9540A */
+ GEN1_I2C_GPIO_EXP_0x21 = 0x21, /* Cypress CY8C9540A */
+
+ GEN2_I2C_GPIO_EXP0 = 0x25, /* NXP PCAL9535A */
+ GEN2_I2C_GPIO_EXP1 = 0x26, /* NXP PCAL9535A */
+ GEN2_I2C_GPIO_EXP2 = 0x27, /* NXP PCAL9535A */
+ GEN2_I2C_LED_PWM = 0x47, /* NXP PCAL9685 */
+};
+
+/* Cypress CY8C9548A registers */
+#define GEN1_GPIO_EXP_INPUT0 0x00
+#define GEN1_GPIO_EXP_INPUT1 0x01
+#define GEN1_GPIO_EXP_INPUT2 0x02
+#define GEN1_GPIO_EXP_INPUT3 0x03
+#define GEN1_GPIO_EXP_INPUT4 0x04
+#define GEN1_GPIO_EXP_INPUT5 0x05
+#define GEN1_GPIO_EXP_OUTPUT0 0x08
+#define GEN1_GPIO_EXP_OUTPUT1 0x09
+#define GEN1_GPIO_EXP_OUTPUT2 0x0a
+#define GEN1_GPIO_EXP_OUTPUT3 0x0b
+#define GEN1_GPIO_EXP_OUTPUT4 0x0c
+#define GEN1_GPIO_EXP_OUTPUT5 0x0d
+#define GEN1_GPIO_EXP_PORT_SELECT 0x18
+#define GEN1_GPIO_EXP_PORT_DIR 0x1c
+
+/* NXP PCAL9535A registers */
+#define GEN2_GPIO_EXP_INPUT0 0x00
+#define GEN2_GPIO_EXP_INPUT1 0x01
+#define GEN2_GPIO_EXP_OUTPUT0 0x02
+#define GEN2_GPIO_EXP_OUTPUT1 0x03
+#define GEN2_GPIO_EXP_POLARITY0 0x04
+#define GEN2_GPIO_EXP_POLARITY1 0x05
+#define GEN2_GPIO_EXP_CONFIG0 0x06
+#define GEN2_GPIO_EXP_CONFIG1 0x07
+#define GEN2_GPIO_EXP_INPUT_LATCH0 0x44
+#define GEN2_GPIO_EXP_INPUT_LATCH1 0x45
+#define GEN2_GPIO_EXP_PULL_UP_DOWN_EN0 0x46
+#define GEN2_GPIO_EXP_PULL_UP_DOWN_EN1 0x47
+#define GEN2_GPIO_EXP_PULL_UP_DOWN_SEL0 0x46
+#define GEN2_GPIO_EXP_PULL_UP_DOWN_SEL1 0x47
+
+#define MAINBOARD_ACCESS(cmd_, reg_, size_, mask_, value_, timeout_, reg_set_) \
+ _REG_SCRIPT_ENCODE_RAW(REG_SCRIPT_COMMAND_##cmd_, MAINBOARD_TYPE, \
+ size_, reg_, mask_, value_, timeout_, reg_set_)
+
+/* I2C chip register access macros */
+#define REG_I2C_ACCESS(cmd_, reg_, mask_, value_, timeout_, slave_addr_) \
+ MAINBOARD_ACCESS(cmd_, reg_, REG_SCRIPT_SIZE_8, mask_, value_, \
+ timeout_, slave_addr_)
+#define REG_I2C_READ(slave_addr_, reg_) \
+ REG_I2C_ACCESS(READ, reg_, 0, 0, 0, slave_addr_)
+#define REG_I2C_WRITE(slave_addr_, reg_, value_) \
+ REG_I2C_ACCESS(WRITE, reg_, 0, value_, 0, slave_addr_)
+#define REG_I2C_AND(slave_addr_, reg_, value_) \
+ REG_I2C_RMW(slave_addr_, reg_, value_, 0)
+#define REG_I2C_RMW(slave_addr_, reg_, mask_, value_) \
+ REG_I2C_ACCESS(RMW, reg_, mask_, value_, 0, slave_addr_)
+#define REG_I2C_RXW(slave_addr_, reg_, mask_, value_) \
+ REG_I2C_ACCESS(RXW, reg_, mask_, value_, 0, slave_addr_)
+#define REG_I2C_OR(slave_addr_, reg_, value_) \
+ REG_I2C_RMW(slave_addr_, reg_, 0xff, value_)
+#define REG_I2C_POLL(slave_addr_, reg_, mask_, value_, timeout_) \
+ REG_I2C_ACCESS(POLL, reg_, mask_, value_, timeout_, slave_addr_)
+#define REG_I2C_XOR(slave_addr_, reg_, value_) \
+ REG_I2C_RXW(slave_addr_, reg_, 0xff, value_)
+
+#endif /* _GALILEO_REG_ACCESS_H_ */
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