[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Add VBT locate helper function
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Fri May 13 20:22:52 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14805
-gerrit
commit 10b6cc8dcf62cf407bc4b600ed43162255d1a2f2
Author: Abhay Kumar <abhay.kumar at intel.com>
Date: Fri May 6 17:02:44 2016 -0700
drivers/intel/fsp2_0: Add VBT locate helper function
Add fsp_locate_vbt() helper function that locates VBT file.
Change-Id: Ibda3be48e8ae8b70c6cc1d7ea7248e0c91e955f4
Signed-off-by: Abhay Kumar <abhay.kumar at intel.com>
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/drivers/intel/fsp2_0/graphics.c | 25 +++++++++++++++++++------
src/drivers/intel/fsp2_0/include/fsp/util.h | 6 ++++--
src/drivers/intel/fsp2_0/silicon_init.c | 18 ++++++++++++++++--
src/soc/intel/apollolake/chip.c | 3 ---
4 files changed, 39 insertions(+), 13 deletions(-)
diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c
index 1480179..62caf9e 100644
--- a/src/drivers/intel/fsp2_0/graphics.c
+++ b/src/drivers/intel/fsp2_0/graphics.c
@@ -14,6 +14,8 @@
#include <console/console.h>
#include <fsp/util.h>
+#define VBT_SIGNATURE 0x54425624
+
enum pixel_format {
pixel_rgbx_8bpc = 0,
pixel_bgrx_8bpc = 1,
@@ -93,13 +95,24 @@ enum cb_err fsp_fill_lb_framebuffer(struct lb_framebuffer *framebuffer)
return CB_SUCCESS;
}
-uintptr_t fsp_load_vbt(void)
+enum cb_err fsp_locate_vbt(struct region_device *rdev)
{
- void *vbt;
+ uint32_t vbtsig;
+ struct cbfsf file_desc;
- vbt = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, NULL);
- if (!vbt)
- printk(BIOS_NOTICE, "Could not locate a VBT file in CBFS\n");
+ if (cbfs_boot_locate(&file_desc, "vbt.bin", NULL) < 0) {
+ printk(BIOS_ERR, "Could not locate a VBT file in in CBFS\n");
+ return CB_ERR;
+ }
- return (uintptr_t)vbt;
+ rdev_readat(&file_desc.data, &vbtsig, 0, sizeof(uint32_t));
+
+ if (vbtsig != VBT_SIGNATURE) {
+ printk(BIOS_ERR, "Invalid signature in VBT data file!\n");
+ return CB_ERR;
+ }
+
+ *rdev = file_desc.data;
+
+ return CB_SUCCESS;
}
diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h
index d9d9539..304666b 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/util.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/util.h
@@ -14,6 +14,8 @@
#define _FSP2_0_UTIL_H_
#include <boot/coreboot_tables.h>
+#include <cbfs.h>
+#include <commonlib/region.h>
#include <fsp/info_header.h>
#include <memrange.h>
@@ -36,7 +38,7 @@ void fsp_print_memory_resource_hobs(const void *hob_list);
/* Load an FSP binary into CBFS, and fill the associated fsp_header struct */
enum cb_err fsp_load_binary(struct fsp_header *hdr, const char *name,
struct range_entry *r);
-/* Load a vbt.bin file for graphics. Returns 0 if a valid VBT is not found. */
-uintptr_t fsp_load_vbt(void);
+/* Locate vbt.bin file for graphics. */
+enum cb_err fsp_locate_vbt(struct region_device *rdev);
#endif /* _FSP2_0_UTIL_H_ */
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index e7d8c54..5f70391 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -28,6 +28,8 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr)
struct FSPS_UPD upd, *supd;
fsp_silicon_init_fn silicon_init;
enum fsp_status status;
+ void *vbt = NULL;
+ struct region_device vbt_rdev;
supd = (struct FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
@@ -38,16 +40,28 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr)
memcpy(&upd, supd, sizeof(upd));
+ upd.FspsConfig.GraphicsConfigPtr = (uintptr_t)NULL;
+
+ if (fsp_locate_vbt(&vbt_rdev) != CB_ERR) {
+ vbt = rdev_mmap(&vbt_rdev, 0, region_device_sz(&vbt_rdev));
+ upd.FspsConfig.GraphicsConfigPtr = (uintptr_t)vbt;
+ }
+
/* Give SoC/mainboard a chance to populate entries */
platform_fsp_silicon_init_params_cb(&upd);
timestamp_add_now(TS_FSP_SILICON_INIT_START);
silicon_init = (void *) (hdr->image_base +
- hdr->silicon_init_entry_offset);
- status = silicon_init(&upd);
+ hdr->silicon_init_entry_offset);
timestamp_add_now(TS_FSP_SILICON_INIT_END);
+ status = silicon_init(&upd);
+
+ if (vbt)
+ rdev_munmap(&vbt_rdev, vbt);
+
printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+
return status;
}
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 6e0a90f..e2809c7 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -83,9 +83,6 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
struct FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
static struct soc_intel_apollolake_config *cfg;
- /* Load VBT before devicetree-specific config. */
- silconfig->GraphicsConfigPtr = fsp_load_vbt();
-
struct device *dev = NB_DEV_ROOT;
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
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