[coreboot-gerrit] New patch to review for coreboot: soc/intel/apollolake: Take advantage of common opregion code
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Fri May 13 04:59:17 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14807
-gerrit
commit 740b87dd8124cd609ee787fae5f9d203bbf5f673
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Thu May 12 19:11:48 2016 -0700
soc/intel/apollolake: Take advantage of common opregion code
Change-Id: I2d16336513bcd5a0544a6b68b609e40dd7c141fb
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/soc/intel/apollolake/Kconfig | 1 +
src/soc/intel/apollolake/chip.c | 3 ---
src/soc/intel/apollolake/graphics.c | 49 +++++++++++++++++++++++++++++++++++++
3 files changed, 50 insertions(+), 3 deletions(-)
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 41a96c9..3fb0c8b 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -44,6 +44,7 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_0
select HAVE_HARD_RESET
select SOC_INTEL_COMMON
+ select SOC_INTEL_COMMON_GFX_OPREGION
config TPM_ON_FAST_SPI
bool
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 6e0a90f..e2809c7 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -83,9 +83,6 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
struct FSP_S_CONFIG *silconfig = &silupd->FspsConfig;
static struct soc_intel_apollolake_config *cfg;
- /* Load VBT before devicetree-specific config. */
- silconfig->GraphicsConfigPtr = fsp_load_vbt();
-
struct device *dev = NB_DEV_ROOT;
if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index 2384062..f6247a0 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -15,12 +15,15 @@
* GNU General Public License for more details.
*/
+#include <arch/acpi.h>
+#include <arch/acpigen.h>
#include <console/console.h>
#include <fsp/util.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/pci_ids.h>
+#include <soc/intel/common/opregion.h>
static uintptr_t framebuffer_bar = (uintptr_t)NULL;
@@ -53,11 +56,57 @@ static void igd_set_resources(struct device *dev)
pci_dev_set_resources(dev);
}
+static unsigned long igd_write_opregion(device_t dev, unsigned long current,
+ struct acpi_rsdp *rsdp)
+{
+ igd_opregion_t *opregion;
+ optionrom_vbt_t *vbt;
+ struct cbfsf file_desc;
+ struct region_device *vbt_rdev;
+ uint16_t reg16;
+
+ printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
+ opregion = (igd_opregion_t *)current;
+
+ vbt_rdev = fsp_locate_vbt(&file_desc);
+
+ if (!vbt_rdev) {
+ printk(BIOS_ERR, "VBT not found\n");
+ return;
+ }
+
+ vbt = rdev_mmap(vbt_rdev, 0, region_device_sz(vbt_rdev));
+
+ if (!vbt) {
+ printk(BIOS_ERR, "VBT couldn't be read\n");
+ return;
+ }
+
+ if (init_igd_opregion(opregion, vbt))
+ current += sizeof(igd_opregion_t);
+
+ rdev_munmap(vbt_rdev, vbt);
+
+ /*
+ * TODO This needs to happen in S3 resume, too.
+ * Maybe it should move to the finalize handler.
+ */
+
+ pci_write_config32(dev, ASLS, (uintptr_t)opregion);
+ reg16 = pci_read_config16(dev, SWSCI);
+ reg16 &= ~(1 << 0);
+ reg16 |= (1 << 15);
+ pci_write_config16(dev, SWSCI, reg16);
+
+ return acpi_align_current(current);
+}
+
static const struct device_operations igd_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = igd_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = pci_dev_init,
+ .write_acpi_tables = igd_write_opregion,
.enable = DEVICE_NOOP
};
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